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From: | Richard Henderson |
Subject: | Re: [Qemu-ppc] [PATCH v5 3/9] target-ppc: Implement mtvsrws instruction |
Date: | Wed, 28 Sep 2016 21:08:19 -0700 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.3.0 |
On 09/28/2016 07:19 PM, Nikunj A Dadhania wrote:
Richard Henderson <address@hidden> writes:On 09/28/2016 11:41 AM, Nikunj A Dadhania wrote:+ tcg_gen_mov_i64(t0, cpu_gpr[rA(ctx->opcode)]); + tcg_gen_deposit_i64(cpu_vsrl(xT(ctx->opcode)), t0, t0, 32, 32);Why are you using t0?Thought about dropping it, but wasn't sure if deposit_i64 would change it.
Nope, all of the tcg-op.c functions are safe that way, only modifying the outputs. r~
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