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Re: [Qemu-ppc] [PATCH v4 0/9] POWER9 TCG enablements - part4
From: |
Nikunj A Dadhania |
Subject: |
Re: [Qemu-ppc] [PATCH v4 0/9] POWER9 TCG enablements - part4 |
Date: |
Wed, 28 Sep 2016 11:08:04 +0530 |
User-agent: |
Notmuch/0.21 (https://notmuchmail.org) Emacs/25.0.94.1 (x86_64-redhat-linux-gnu) |
Nikunj A Dadhania <address@hidden> writes:
> This series contains 7 new instructions for POWER9 ISA3.0
> Use newer qemu load/store tcg helpers and optimize stxvw4x and lxvw4x.
>
> GCC was adding epilogue for every VSX instructions causing change in
> behaviour. For testing the load vector instructions used mfvsrld/mfvsrd
> for loading vsr to register. And for testing store vector, used mtvsrdd
> instructions. This helped in getting rid of the epilogue added by gcc. Tried
> adding the test cases to kvm-unit-tests, but executing vsx instructions
> results in cpu exception. Will debug that later. I will send the test code
> and steps to execute as reply to this email.
Source code for stxv_x.c and lxv_x.c is attached and following are the
steps to use them:
Compile using IBM Advance toolchain[1]:
=======================================
/opt/at10.0/bin/powerpc64-linux-gnu-gcc -static -O3 lxv_x.c -o be_lxv_x
/opt/at10.0/bin/powerpc64-linux-gnu-gcc -static -O3 stxv_x.c -o be_stxv_x
/opt/at10.0/bin/powerpc64le-linux-gnu-gcc -static -O3 lxv_x.c -o le_lxv_x
/opt/at10.0/bin/powerpc64le-linux-gnu-gcc -static -O3 stxv_x.c -o le_stxv_x
Run following for testing the instructions:
===========================================
for i in lxv_x stxv_x
do
echo "Running ... $i"
echo ">>>>>>>>>>>>>>>> LE LE LE >>>>>>>>>>>>>>"
../qemu/ppc64le-linux-user/qemu-ppc64le -cpu POWER9 le_${i}
echo ">>>>>>>>>>>>>>>> BE BE BE >>>>>>>>>>>>>>"
../qemu/ppc64-linux-user/qemu-ppc64 -cpu POWER9 be_${i}
echo ">>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>"
done
Regards
Nikunj
1. ftp://ftp.unicamp.br/pub/linuxpatch/toolchain/at/redhat/Fedora22
stxv_x.c
Description: stxv_x.c
lxv_x.c
Description: lxv_x.c
- Re: [Qemu-ppc] [PATCH v4 6/9] target-ppc: add lxvh8x instruction, (continued)
[Qemu-ppc] [PATCH v4 5/9] target-ppc: improve stxvw4x implementation, Nikunj A Dadhania, 2016/09/28
[Qemu-ppc] [PATCH v4 8/9] target-ppc: add lxvb16x instruction, Nikunj A Dadhania, 2016/09/28
[Qemu-ppc] [PATCH v4 7/9] target-ppc: add stxvh8x instruction, Nikunj A Dadhania, 2016/09/28
[Qemu-ppc] [PATCH v4 9/9] target-ppc: add stxvb16x instruction, Nikunj A Dadhania, 2016/09/28
Re: [Qemu-ppc] [PATCH v4 0/9] POWER9 TCG enablements - part4,
Nikunj A Dadhania <=
Re: [Qemu-ppc] [PATCH v4 0/9] POWER9 TCG enablements - part4, Thomas Huth, 2016/09/28