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[Qemu-ppc] [PULL 40/45] ppc/xics: account correct irq status
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 40/45] ppc/xics: account correct irq status |
Date: |
Fri, 23 Sep 2016 17:15:16 +1000 |
From: Nikunj A Dadhania <address@hidden>
Fix inconsistent irq status, because of this in the trace logs, for e.g.
LSI status was 0x7, i.e. XICS_STATUS_ASSERTED, XICS_STATUS_SENT and
XICS_STATUS_REJECTED all set, which did not make sense. So the REJECTED
would have been set in earlier interrupt cycle, and then asserted and
sent in this current one.
Signed-off-by: Nikunj A Dadhania <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/intc/xics.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index cd48f42..69162f0 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -505,8 +505,11 @@ static void ics_reject(ICSState *ics, int nr)
ICSIRQState *irq = ics->irqs + nr - ics->offset;
trace_xics_ics_reject(nr, nr - ics->offset);
- irq->status |= XICS_STATUS_REJECTED; /* Irrelevant but harmless for LSI */
- irq->status &= ~XICS_STATUS_SENT; /* Irrelevant but harmless for MSI */
+ if (irq->flags & XICS_FLAGS_IRQ_MSI) {
+ irq->status |= XICS_STATUS_REJECTED;
+ } else if (irq->flags & XICS_FLAGS_IRQ_LSI) {
+ irq->status &= ~XICS_STATUS_SENT;
+ }
}
static void ics_resend(ICSState *ics)
--
2.7.4
- [Qemu-ppc] [PULL 19/45] spapr_vio: convert to trace framework instead of DPRINTF, (continued)
- [Qemu-ppc] [PULL 19/45] spapr_vio: convert to trace framework instead of DPRINTF, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 20/45] spapr_llan: convert to trace framework instead of DPRINTF, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 21/45] spapr_vscsi: convert to trace framework instead of DPRINTF, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 24/45] target-ppc: convert ld[16, 32, 64]ur to use new macro, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 22/45] target-ppc: consolidate load operations, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 31/45] target-ppc: add xxspltib instruction, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 36/45] target-ppc: add TLB_NEED_LOCAL_FLUSH flag, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 27/45] target-ppc: convert st[16, 32, 64]r to use new macro, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 30/45] target-ppc: consolidate store conditional, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 43/45] linux-user: ppc64: fix ARCH_206 bit in AT_HWCAP, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 40/45] ppc/xics: account correct irq status,
David Gibson <=
- [Qemu-ppc] [PULL 25/45] target-ppc: consolidate store operations, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 35/45] spapr: Introduce sPAPRCPUCoreClass, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 05/45] target-ppc: add vector count trailing zeros instructions, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 08/45] ppc: Fix signal delivery in ppc-user and ppc64-user, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 32/45] target-ppc: add lxsi[bw]zx instruction, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 34/45] target-ppc: implement darn instruction, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 44/45] monitor: fix crash for platforms without a CPU 0, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 06/45] target-ppc: add vector bit permute doubleword instruction, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 28/45] target-ppc: consolidate load with reservation, David Gibson, 2016/09/23
- [Qemu-ppc] [PULL 29/45] target-ppc: move out stqcx impementation, David Gibson, 2016/09/23