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[Qemu-ppc] [PULL 28/66] ppc: Don't update NIP in lmw/stmw/icbi
From: |
David Gibson |
Subject: |
[Qemu-ppc] [PULL 28/66] ppc: Don't update NIP in lmw/stmw/icbi |
Date: |
Tue, 6 Sep 2016 13:40:15 +1000 |
From: Benjamin Herrenschmidt <address@hidden>
Instead, pass GETPC() result to the corresponding helpers.
Signed-off-by: Benjamin Herrenschmidt <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/mem_helper.c | 11 ++++++-----
target-ppc/translate.c | 6 ------
2 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/target-ppc/mem_helper.c b/target-ppc/mem_helper.c
index de96c91..e20a53e 100644
--- a/target-ppc/mem_helper.c
+++ b/target-ppc/mem_helper.c
@@ -57,9 +57,9 @@ void helper_lmw(CPUPPCState *env, target_ulong addr, uint32_t
reg)
{
for (; reg < 32; reg++) {
if (needs_byteswap(env)) {
- env->gpr[reg] = bswap32(cpu_ldl_data(env, addr));
+ env->gpr[reg] = bswap32(cpu_ldl_data_ra(env, addr, GETPC()));
} else {
- env->gpr[reg] = cpu_ldl_data(env, addr);
+ env->gpr[reg] = cpu_ldl_data_ra(env, addr, GETPC());
}
addr = addr_add(env, addr, 4);
}
@@ -69,9 +69,10 @@ void helper_stmw(CPUPPCState *env, target_ulong addr,
uint32_t reg)
{
for (; reg < 32; reg++) {
if (needs_byteswap(env)) {
- cpu_stl_data(env, addr, bswap32((uint32_t)env->gpr[reg]));
+ cpu_stl_data_ra(env, addr, bswap32((uint32_t)env->gpr[reg]),
+ GETPC());
} else {
- cpu_stl_data(env, addr, (uint32_t)env->gpr[reg]);
+ cpu_stl_data_ra(env, addr, (uint32_t)env->gpr[reg], GETPC());
}
addr = addr_add(env, addr, 4);
}
@@ -178,7 +179,7 @@ void helper_icbi(CPUPPCState *env, target_ulong addr)
* (not a fetch) by the MMU. To be sure it will be so,
* do the load "by hand".
*/
- cpu_ldl_data(env, addr);
+ cpu_ldl_data_ra(env, addr, GETPC());
}
/* XXX: to be tested */
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 568c1f8..dc5ebb1 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2869,8 +2869,6 @@ static void gen_lmw(DisasContext *ctx)
TCGv t0;
TCGv_i32 t1;
gen_set_access_type(ctx, ACCESS_INT);
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
t0 = tcg_temp_new();
t1 = tcg_const_i32(rD(ctx->opcode));
gen_addr_imm_index(ctx, t0, 0);
@@ -2885,8 +2883,6 @@ static void gen_stmw(DisasContext *ctx)
TCGv t0;
TCGv_i32 t1;
gen_set_access_type(ctx, ACCESS_INT);
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
t0 = tcg_temp_new();
t1 = tcg_const_i32(rS(ctx->opcode));
gen_addr_imm_index(ctx, t0, 0);
@@ -4109,8 +4105,6 @@ static void gen_icbi(DisasContext *ctx)
{
TCGv t0;
gen_set_access_type(ctx, ACCESS_CACHE);
- /* NIP cannot be restored if the memory exception comes from an helper */
- gen_update_nip(ctx, ctx->nip - 4);
t0 = tcg_temp_new();
gen_addr_reg_index(ctx, t0);
gen_helper_icbi(cpu_env, t0);
--
2.7.4
- [Qemu-ppc] [PULL 40/66] ppc: Speed up dcbz, (continued)
- [Qemu-ppc] [PULL 40/66] ppc: Speed up dcbz, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 27/66] ppc: Don't update NIP in lswi/lswx/stswi/stswx, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 64/66] spapr: implement H_CHANGE_LOGICAL_LAN_MAC h_call, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 01/66] xics_kvm: drop extra checking of kernel_xics_fd, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 05/66] target-ppc: adding addpcis instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 10/66] target-ppc: add cnttzw[.] instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 55/66] hw/ppc: use error_report instead of fprintf, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 56/66] hw/ppc: add a ppc_create_page_sizes_prop() helper routine, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 35/66] ppc: Don't update NIP on conditional trap instructions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 24/66] ppc: Make float_check_status() pass the return address, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 28/66] ppc: Don't update NIP in lmw/stmw/icbi,
David Gibson <=
- [Qemu-ppc] [PULL 36/66] ppc: Don't update NIP if not taking alignment exceptions, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 32/66] ppc: Don't update NIP in DCR access routines, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 33/66] ppc: Don't update NIP in facility unavailable interrupts, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 37/66] ppc: Don't update NIP in dcbz and lscbx, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 52/66] target-ppc: add vsrv instruction, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 46/66] target-ppc: implement branch-less divw[o][.], David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 43/66] ppc: Use a helper to generate "LE unsupported" alignment interrupts, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 58/66] ppc: Fix catching some segfaults in user mode, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 44/66] ppc: load/store multiple and string insns don't do LE, David Gibson, 2016/09/05
- [Qemu-ppc] [PULL 39/66] ppc: Handle unconditional (always/never) traps at translation time, David Gibson, 2016/09/05