[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [Qemu-devel] [PATCH RFC 2/4] target-ppc: with MTTCG repor
From: |
Greg Kurz |
Subject: |
Re: [Qemu-ppc] [Qemu-devel] [PATCH RFC 2/4] target-ppc: with MTTCG report more threads |
Date: |
Fri, 2 Sep 2016 11:28:09 +0200 |
On Fri, 2 Sep 2016 12:02:54 +0530
Nikunj A Dadhania <address@hidden> wrote:
> Signed-off-by: Nikunj A Dadhania <address@hidden>
> ---
Shouldn't this patch be the last one, when all other issues have been addressed
?
> target-ppc/kvm.c | 2 +-
> target-ppc/kvm_ppc.h | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target-ppc/kvm.c b/target-ppc/kvm.c
> index dcb68b9..20eb450 100644
> --- a/target-ppc/kvm.c
> +++ b/target-ppc/kvm.c
> @@ -2090,7 +2090,7 @@ void kvmppc_set_mpic_proxy(PowerPCCPU *cpu, int
> mpic_proxy)
>
> int kvmppc_smt_threads(void)
> {
> - return cap_ppc_smt ? cap_ppc_smt : 1;
> + return cap_ppc_smt ? cap_ppc_smt : 8;
If KVM is there but does not support SMT processor modes, it looks
wrong to return anything but 1. This check needs kvm_enabled().
Also, why 8 ? This depends on the CPU model. Also, since real HW allows to
choose the SMT mode, maybe this should be configurable from the command
line as well.
> }
>
> #ifdef TARGET_PPC64
> diff --git a/target-ppc/kvm_ppc.h b/target-ppc/kvm_ppc.h
> index 5461d10..053db0a 100644
> --- a/target-ppc/kvm_ppc.h
> +++ b/target-ppc/kvm_ppc.h
> @@ -128,7 +128,7 @@ static inline void kvmppc_set_mpic_proxy(PowerPCCPU *cpu,
> int mpic_proxy)
>
> static inline int kvmppc_smt_threads(void)
> {
> - return 1;
> + return 8;
Same remark.
> }
>
> static inline int kvmppc_or_tsr_bits(PowerPCCPU *cpu, uint32_t tsr_bits)
Cheers.
--
Greg
[Qemu-ppc] [PATCH RFC 2/4] target-ppc: with MTTCG report more threads, Nikunj A Dadhania, 2016/09/02
- Re: [Qemu-ppc] [Qemu-devel] [PATCH RFC 2/4] target-ppc: with MTTCG report more threads,
Greg Kurz <=
Re: [Qemu-ppc] [PATCH RFC 2/4] target-ppc: with MTTCG report more threads, David Gibson, 2016/09/07
[Qemu-ppc] [PATCH RFC 4/4] target-ppc: flush tlb from all the cpu, Nikunj A Dadhania, 2016/09/02