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From: | Richard Henderson |
Subject: | Re: [Qemu-ppc] [RFC v2 12/13] target-ppc: add maddhd and maddhdu instruction |
Date: | Sun, 24 Jul 2016 07:06:49 +0530 |
User-agent: | Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.1.1 |
On 07/23/2016 02:14 PM, Nikunj A Dadhania wrote:
maddhd: Multiply-Add High Doubleword maddhdu: Multiply-Add High Doubleword Unsigned Above two instruction are dual form and differ by 1 bit (31st bit) Multiplies two 64-bit registers (RA * RB), adds third register(RC) to the result(quadword) and returns the higher dword in the target register(RT). Signed-off-by: Nikunj A Dadhania <address@hidden> --- target-ppc/translate.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+)
Reviewed-by: Richard Henderson <address@hidden> r~
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