Re: [Qemu-ppc] [Qemu-devel] [PATCH 0/3] ppc: complete the new HV mode

[Mark Cave-Ayland]

On 03/06/16 15:14, Mark Cave-Ayland wrote:

> On 03/06/16 15:06, Cedric Le Goater wrote:
> 
>> On 06/03/2016 04:00 PM, Cédric Le Goater wrote:
>>> Hello Mark,
>>>
>>> On 06/03/2016 03:52 PM, Mark Cave-Ayland wrote:
>>>> On 03/06/16 13:11, Cédric Le Goater wrote:
>>>>
>>>>> This is follow up to complete the serie "ppc: preparing pnv landing
>>>>> (round 2)" plus a little fix on instruction privileges.
>>>>>
>>>>> Tested on a POWER8 pserie guest and on mac99.
>>>>>
>>>>> Benjamin Herrenschmidt (2):
>>>>>   ppc: Fix hreg_store_msr() so that non-HV mode cannot alter MSR:HV
>>>>>   ppc: Better figure out if processor has HV mode
>>>>>
>>>>> Cédric Le Goater (1):
>>>>>   ppc: fix hrfid, tlbia and slbia privilege
>>>>>
>>>>>  target-ppc/cpu.h            |  4 ++++
>>>>>  target-ppc/excp_helper.c    |  8 ++++++--
>>>>>  target-ppc/helper_regs.h    |  4 ++--
>>>>>  target-ppc/translate.c      | 10 ++++++----
>>>>>  target-ppc/translate_init.c | 19 +++++++++++++++----
>>>>>  5 files changed, 33 insertions(+), 12 deletions(-)
>>>>
>>>> Hi Cédric,
>>>>
>>>> I can confirm that this patchset fixes starting up OpenBIOS for both
>>>> g3beige/mac99 in my tests here. With the escc fix also applied, the only
>>>> outstanding issue is the removal of the tlb_flush() statements which
>>>> causes Darwin, MacOS X and HelenOS 0.60 to panic on boot
>>>
>>> Is that just booting the CDROM or the complete OS ? because I tried that a 
>>> couple of time with ppc-for-2.7-20160531 + the three patches above and 
>>> did not see the issue again. I reached the device selection prompt. 
>>>
>>> I must be doing something wrong. 
>>
>> I was using '-cpu 750' for some reason and this is why it succeeded. It fails
>> without. We are getting close. 
> 
> Hmmm that works for -M g3beige Darwin, but not HelenOS here. Although
> interestingly -M g3beige -m 256 seems to "fix" Darwin here too
> (presumably because the memory allocation routines can just allocate new
> RAM rather than reusing existing RAM which may be cached in the TLB).
> 
> What a strange coincidence that I've just posted a patch that fixes up
> the debugging in target-ppc/mmu_helper.c ;)

It also looks like you need my beta patch to convert the macio
controller over to using the DMA helpers here:
https://lists.nongnu.org/archive/html/qemu-devel/2016-05/msg04907.html.
At least that seems to progress things a little further on one of my
MacOS tests.

Looking at the DBDMA code I still see a few calls to
cpu_physical_memory_read() / cpu_physical_memory_write() scattered
around. Do these need to be switched over to dma_memory_read() /
dma_memory_write() in order to correctly invalidate the TLB upon write?


ATB,

Mark.