[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [Qemu-ppc] [PULL 1/3] ppc: Rework POWER7 & POWER8 exception model
From: |
Benjamin Herrenschmidt |
Subject: |
Re: [Qemu-ppc] [PULL 1/3] ppc: Rework POWER7 & POWER8 exception model |
Date: |
Wed, 06 Apr 2016 06:42:51 +1000 |
On Tue, 2016-04-05 at 09:03 +0200, Cédric Le Goater wrote:
>
> Well, yes, but cpu_ppc_set_papr() only handles the AMOR setting, the LPCR
> settings were kept for later as they were not bug fixes.
>
> As for now, powerpc_excp() checks the ILE bit and uses the AIL bits to
> calculate the vector address, which was done before in the H_SET_MODE
> hcall. This allows some simplification, getting rid of excp_prefix,
> and fixes a migration bug in TCG.
Ah I see, the patch I'm commenting on doesn't actually have my lpes0/1
changes, so it should be ok.
Cheers,
Ben.
[Qemu-ppc] [PULL 2/3] spapr_drc: enable immediate detach for unsignalled devices, David Gibson, 2016/04/04
[Qemu-ppc] [PULL 3/3] vl: Move cpu_synchronize_all_states() into qemu_system_reset(), David Gibson, 2016/04/04
Re: [Qemu-ppc] [PULL 0/3] ppc-for-2.6 queue 20160405, Peter Maydell, 2016/04/05