Re: [Qemu-ppc] [PATCH] target-ppc: Multiple/String Word alignment exception

[Laurent Vivier]

On 31/03/2016 08:54, Alexander Graf wrote:
> 
> 
> On 31.03.16 01:29, David Gibson wrote:
>> On Wed, 30 Mar 2016 19:13:00 +0200
>> Laurent Vivier <address@hidden> wrote:
>>
>>> If the processor is in little-endian mode, an alignment interrupt must
>>> occur for the following instructions: lmw, stmw, lswi, lswx, stswi or stswx.
>>>
>>> This is what happens with KVM, so change TCG to do the same.
>>>
>>> As the instruction can be emulated by the kernel, enable the change
>>> only in softmmu mode.
>>>
>>> Signed-off-by: Laurent Vivier <address@hidden>
>>
>> I guess this makes sense given the existing hardware behaviour, even
>> though it seems a bit perverse to me to make the emulator strictly less
>> functional.
>>
>> Alex, what do you think?
> 
> In general we only implement strict checks if it breaks guests not to
> have them. Are you aware of any such case?

No, it does not break anything. The idea was to have the same behavior
with TCG as with a real CPU (or kvm). But if it is not the rule, we can
drop this patch.

Thanks,
Laurent