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[Qemu-ppc] [RFC 5/9] target-ppc: Remove unused mmu models from ppc_tlb_i
From: |
David Gibson |
Subject: |
[Qemu-ppc] [RFC 5/9] target-ppc: Remove unused mmu models from ppc_tlb_invalidate_one |
Date: |
Fri, 15 Jan 2016 18:04:36 +1100 |
ppc_tlb_invalidate_one() has a big switch handling many different MMU
types. However, most of those branches can never be reached:
It is called from 3 places: from remove_hpte() and h_protect() in
spapr_hcall.c (which always has a 64-bit hash MMU type), and from
helper_tlbie() in mmu_helper.c.
Calls to helper_tlbie() are generated from gen_tlbiel, gen_tlbiel and
gen_tlbiva. The first two are only used with the PPC_MEM_TLBIE flag,
set only with 32-bit or 64-bit hash MMU models, and gen_tlbiva() is
used only on 440 and 460 models with the BookE mmu model.
These means the exhaustive list of MMU types which may call
ppc_tlb_invalidate_one() is: POWERPC_MMU_SOFT_6xx, POWERPC_MMU_601,
POWERPC_MMU_32B, POWERPC_MMU_SOFT_74xx, POWERPC_MMU_64B, POWERPC_MMU_2_03,
POWERPC_MMU_2_06, POWERPC_MMU_2_07 and POWERPC_MMU_BOOKE.
Clean up by removing logic for all other MMU types from
ppc_tlb_invalidate_one().
Signed-off-by: David Gibson <address@hidden>
---
target-ppc/mmu_helper.c | 20 ++------------------
1 file changed, 2 insertions(+), 18 deletions(-)
diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
index 0ab73bc..1b8e65e 100644
--- a/target-ppc/mmu_helper.c
+++ b/target-ppc/mmu_helper.c
@@ -1971,25 +1971,10 @@ void ppc_tlb_invalidate_one(CPUPPCState *env,
target_ulong addr)
ppc6xx_tlb_invalidate_virt(env, addr, 1);
}
break;
- case POWERPC_MMU_SOFT_4xx:
- case POWERPC_MMU_SOFT_4xx_Z:
- ppc4xx_tlb_invalidate_virt(env, addr, env->spr[SPR_40x_PID]);
- break;
- case POWERPC_MMU_REAL:
- cpu_abort(CPU(cpu), "No TLB for PowerPC 4xx in real mode\n");
- break;
- case POWERPC_MMU_MPC8xx:
- /* XXX: TODO */
- cpu_abort(CPU(cpu), "MPC8xx MMU model is not implemented\n");
- break;
case POWERPC_MMU_BOOKE:
/* XXX: TODO */
cpu_abort(CPU(cpu), "BookE MMU model is not implemented\n");
break;
- case POWERPC_MMU_BOOKE206:
- /* XXX: TODO */
- cpu_abort(CPU(cpu), "BookE 2.06 MMU model is not implemented\n");
- break;
case POWERPC_MMU_32B:
case POWERPC_MMU_601:
/* tlbie invalidate TLBs for all segments */
@@ -2031,9 +2016,8 @@ void ppc_tlb_invalidate_one(CPUPPCState *env,
target_ulong addr)
break;
#endif /* defined(TARGET_PPC64) */
default:
- /* XXX: TODO */
- cpu_abort(CPU(cpu), "Unknown MMU model\n");
- break;
+ /* Should never reach here with other MMU models */
+ assert(0);
}
#else
ppc_tlb_invalidate_all(env);
--
2.5.0
- [Qemu-ppc] [RFC 0/9] Clean up page size handling for ppc 64-bit hash MMUs with TCG, David Gibson, 2016/01/15
- [Qemu-ppc] [RFC 5/9] target-ppc: Remove unused mmu models from ppc_tlb_invalidate_one,
David Gibson <=
- [Qemu-ppc] [RFC 3/9] target-ppc: Rework SLB page size lookup, David Gibson, 2016/01/15
- [Qemu-ppc] [RFC 7/9] target-ppc: Add new TLB invalidate by HPTE call for hash64 MMUs, David Gibson, 2016/01/15
- [Qemu-ppc] [RFC 1/9] target-ppc: Remove unused kvmppc_read_segment_page_sizes() stub, David Gibson, 2016/01/15
- [Qemu-ppc] [RFC 6/9] target-ppc: Split 44x tlbiva from ppc_tlb_invalidate_one(), David Gibson, 2016/01/15
- [Qemu-ppc] [RFC 9/9] target-ppc: Allow more page sizes for POWER7 & POWER8 in TCG, David Gibson, 2016/01/15
- [Qemu-ppc] [RFC 8/9] target-ppc: Helper to determine page size information from hpte alone, David Gibson, 2016/01/15
- [Qemu-ppc] [RFC 4/9] target-ppc: Use actual page size encodings from HPTE, David Gibson, 2016/01/15
- [Qemu-ppc] [RFC 2/9] target-ppc: Convert mmu-hash{32, 64}.[ch] from CPUPPCState to PowerPCCPU, David Gibson, 2016/01/15