[Qemu-ppc] [PULL 29/37] PPC: e500: Fix GPIO controller interrupt number

[Alexander Graf]

From: Amit Tomar <address@hidden>

The GPIO controller lives at IRQ 47, not 43 on real hardware. This is a problem
because IRQ 43 is occupied by the I2C controller which we want to implement
next, so we'd have a conflict on that IRQ number.

Move the GPIO controller to IRQ 47 where it belongs.

Signed-off-by: Amit Singh Tomar <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
 hw/ppc/e500.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index a2e60b4..7e17d18 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -60,7 +60,7 @@
 #define MPC8544_PCI_REGS_SIZE      0x1000ULL
 #define MPC8544_UTIL_OFFSET        0xe0000ULL
 #define MPC8XXX_GPIO_OFFSET        0x000FF000ULL
-#define MPC8XXX_GPIO_IRQ           43
+#define MPC8XXX_GPIO_IRQ           47
 
 struct boot_info
 {
-- 
1.8.1.4