The patch introduces EEH RTAS servers on sPAPR platform and handle
them there. Each sPAPRPHBVFIOState is binding with only one IOMMU
group, so it can be regarded as PE in nature. The PE address is
maintained in sPAPRPHBState, which has default value 0xffffffff
for non-VFIO PHBs. Otherwise, the PE address is equal to IOMMU
group ID. It can be used to distinguish sPAPRVFIOPHBState from
sPAPRPHBState.
As we're going to support EEH functonality for VFIO PCI devices,
we simply return error if the EEH RTAS call is routed to non-VFIO
PHB whose PE address is 0xffffffff.
Signed-off-by: Gavin Shan <address@hidden>
---
hw/ppc/spapr.c | 1 +
hw/ppc/spapr_pci.c | 1 +
hw/ppc/spapr_pci_vfio.c | 335 ++++++++++++++++++++++++++++++++++++++++++++
include/hw/pci-host/spapr.h | 1 +
include/hw/ppc/spapr.h | 1 +
5 files changed, 339 insertions(+)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index eee0a7c..e394d0c 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1325,6 +1325,7 @@ static void ppc_spapr_init(QEMUMachineInitArgs *args)
spapr_pci_msi_init(spapr, SPAPR_PCI_MSI_WINDOW);
spapr_pci_rtas_init();
spapr_tce_ddw_rtas_init(spapr);
+ spapr_eeh_rtas_init(spapr);
phb = spapr_create_phb(spapr, 0);
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index a9f307a..0f2ac02 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -578,6 +578,7 @@ static void spapr_phb_realize(DeviceState *dev, Error
**errp)
return;
}
+ sphb->pe_addr = 0xffffffff;
sphb->dtbusname = g_strdup_printf("address@hidden" PRIx64, sphb->buid);
namebuf = alloca(strlen(sphb->dtbusname) + 32);
diff --git a/hw/ppc/spapr_pci_vfio.c b/hw/ppc/spapr_pci_vfio.c
index decf3dd..5dbddd0 100644
--- a/hw/ppc/spapr_pci_vfio.c
+++ b/hw/ppc/spapr_pci_vfio.c
+void spapr_eeh_rtas_init(sPAPREnvironment *spapr)
+{
+ spapr_rtas_register("ibm,set-eeh-option",
+ rtas_ibm_set_eeh_option);
+ spapr_rtas_register("ibm,get-config-addr-info2",
+ rtas_ibm_get_config_addr_info2);
+ spapr_rtas_register("ibm,read-slot-reset-state2",
+ rtas_ibm_read_slot_reset_state2);
+ spapr_rtas_register("ibm,set-slot-reset",
+ rtas_ibm_set_slot_reset);
+ spapr_rtas_register("ibm,configure-pe",
+ rtas_ibm_configure_pe);
+ spapr_rtas_register("ibm,slot-error-detail",
+ rtas_ibm_slot_error_detail);