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Re: [Qemu-ppc] [PATCH 7/9] KVM: target-ppc: Enable transactional state m
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From: |
Tom Musta |
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Subject: |
Re: [Qemu-ppc] [PATCH 7/9] KVM: target-ppc: Enable transactional state migration |
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Date: |
Thu, 22 May 2014 06:39:06 -0500 |
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User-agent: |
Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.5.0 |
On 5/21/2014 9:50 PM, Alexey Kardashevskiy wrote:
> On 05/22/2014 04:11 AM, Tom Musta wrote:
>> On 5/21/2014 1:20 AM, Alexey Kardashevskiy wrote:
>>> This adds migration support for registers saved before transaction started.
>>>
[ ... ]
>>
>>
>
>> TM is not limited in the ISA to 64-bit implementations. Why restrict
>> this to TARGET_PPC64?
>
> TS/TM bits in MSR are in top 32bits which are unavailable for 32bit
> machine, and we are emulating a machine here, this is pretty much why.
>
>
OK. This makes more sense to me now. Thanks.
- Re: [Qemu-ppc] [PATCH 2/9] target-ppc: Refactor init_proc_POWER7, (continued)
[Qemu-ppc] [PATCH 4/9] target-ppc: Refactor init_proc_POWER8, Alexey Kardashevskiy, 2014/05/21
[Qemu-ppc] [PATCH 8/9] spapr_hcall: Split h_set_mode(), Alexey Kardashevskiy, 2014/05/21
[Qemu-ppc] [PATCH 6/9] target-ppc: Enable PPR and VRSAVE SPRs migration, Alexey Kardashevskiy, 2014/05/21
[Qemu-ppc] [PATCH 7/9] KVM: target-ppc: Enable transactional state migration, Alexey Kardashevskiy, 2014/05/21