[Qemu-ppc] [PATCH v6 3/3] sPAPR: Support EEH RTAS services

[Gavin Shan]

The patch registers EEH RTAS services, which are emulated with the
help of vfio_eeh_handler() that was introduced in the previous
patch.

Signed-off-by: Gavin Shan <address@hidden>
---
 hw/ppc/spapr_pci.c | 228 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 228 insertions(+)

diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index a9f307a..d82e954 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -22,6 +22,7 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
+#include <linux/vfio.h>
 #include "hw/hw.h"
 #include "hw/pci/pci.h"
 #include "hw/pci/msi.h"
@@ -29,6 +30,7 @@
 #include "hw/pci/pci_host.h"
 #include "hw/ppc/spapr.h"
 #include "hw/pci-host/spapr.h"
+#include "hw/misc/vfio.h"
 #include "exec/address-spaces.h"
 #include <libfdt.h>
 #include "trace.h"
@@ -422,6 +424,219 @@ static void 
rtas_ibm_query_interrupt_source_number(PowerPCCPU *cpu,
     rtas_st(rets, 2, 1);/* 0 == level; 1 == edge */
 }
 
+static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu,
+                                    sPAPREnvironment *spapr,
+                                    uint32_t token, uint32_t nargs,
+                                    target_ulong args, uint32_t nret,
+                                    target_ulong rets)
+{
+    struct vfio_eeh_pe_set_option option;
+    uint32_t addr;
+    uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    sPAPRPHBState *sphb = spapr_find_phb(spapr, buid);
+    int32_t ret;
+
+    if (!sphb || !sphb->parent_obj.bus) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    if ((nargs != 4) || (nret != 1)) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    addr = rtas_ld(args, 0);
+    option.argsz = sizeof(option);
+    option.option = rtas_ld(args, 3);
+    if (option.option > 3) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    ret = vfio_eeh_handler(VFIO_EEH_PE_SET_OPTION, &option,
+                           sphb->parent_obj.bus, addr);
+    if (ret == 0) {
+        rtas_st(rets, 0, RTAS_OUT_SUCCESS);
+    } else {
+        rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
+    }
+}
+
+static void rtas_ibm_get_config_addr_info2(PowerPCCPU *cpu,
+                                           sPAPREnvironment *spapr,
+                                           uint32_t token, uint32_t nargs,
+                                           target_ulong args, uint32_t nret,
+                                           target_ulong rets)
+{
+    struct vfio_eeh_pe_get_addr get_addr;
+    uint32_t addr;
+    uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    sPAPRPHBState *sphb = spapr_find_phb(spapr, buid);
+    int32_t ret;
+
+    if (!sphb || !sphb->parent_obj.bus) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    if ((nargs != 4) || (nret != 2)) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    addr = rtas_ld(args, 0);
+    get_addr.argsz = sizeof(get_addr);
+    get_addr.option = rtas_ld(args, 3);
+    if (get_addr.option != 0 && get_addr.option != 1) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    ret = vfio_eeh_handler(VFIO_EEH_PE_GET_ADDR, &get_addr,
+                           sphb->parent_obj.bus, addr);
+    if (ret == 0) {
+        rtas_st(rets, 0, RTAS_OUT_SUCCESS);
+        rtas_st(rets, 1, get_addr.info);
+    } else {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+    }
+}
+
+static void rtas_ibm_read_slot_reset_state2(PowerPCCPU *cpu,
+                                            sPAPREnvironment *spapr,
+                                            uint32_t token, uint32_t nargs,
+                                            target_ulong args, uint32_t nret,
+                                            target_ulong rets)
+{
+    struct vfio_eeh_pe_get_state get_state;
+    uint32_t addr;
+    uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    sPAPRPHBState *sphb = spapr_find_phb(spapr, buid);
+    int32_t ret;
+
+    if (!sphb || !sphb->parent_obj.bus) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    if ((nargs != 3) || (nret != 4 && nret != 5)) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    addr = rtas_ld(args, 0);
+    get_state.argsz = sizeof(get_state);
+    ret = vfio_eeh_handler(VFIO_EEH_PE_GET_STATE, &get_state,
+                           sphb->parent_obj.bus, addr);
+    if (ret == 0) {
+        rtas_st(rets, 0, RTAS_OUT_SUCCESS);
+        rtas_st(rets, 1, get_state.state);
+        rtas_st(rets, 2, 1);
+        rtas_st(rets, 3, 1000);
+        if (nret >= 5) {
+            rtas_st(rets, 4, 0);
+        }
+    } else {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+    }
+}
+
+static void rtas_ibm_set_slot_reset(PowerPCCPU *cpu,
+                                    sPAPREnvironment *spapr,
+                                    uint32_t token, uint32_t nargs,
+                                    target_ulong args, uint32_t nret,
+                                    target_ulong rets)
+{
+    struct vfio_eeh_pe_reset pe_reset;
+    uint32_t addr;
+    uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    sPAPRPHBState *sphb = spapr_find_phb(spapr, buid);
+    int32_t ret;
+
+    if (!sphb || !sphb->parent_obj.bus) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    if ((nargs != 4) || (nret != 1)) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    addr = rtas_ld(args, 0);
+    pe_reset.argsz = sizeof(pe_reset);
+    pe_reset.option = rtas_ld(args, 3);
+    if (pe_reset.option != 0 &&
+        pe_reset.option != 1 &&
+        pe_reset.option != 3) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    ret = vfio_eeh_handler(VFIO_EEH_PE_RESET, &pe_reset,
+                           sphb->parent_obj.bus, addr);
+    if (ret == 0) {
+        rtas_st(rets, 0, RTAS_OUT_SUCCESS);
+    } else {
+        rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
+    }
+}
+
+static void rtas_ibm_configure_pe(PowerPCCPU *cpu,
+                                  sPAPREnvironment *spapr,
+                                  uint32_t token, uint32_t nargs,
+                                  target_ulong args, uint32_t nret,
+                                  target_ulong rets)
+{
+    uint32_t addr;
+    uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    sPAPRPHBState *sphb = spapr_find_phb(spapr, buid);
+    int32_t ret;
+
+    if (!sphb || !sphb->parent_obj.bus) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    if ((nargs != 3) || (nret != 1)) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    addr = rtas_ld(args, 0);
+    ret = vfio_eeh_handler(VFIO_EEH_PE_CONFIGURE, NULL,
+                           sphb->parent_obj.bus, addr);
+    if (ret == 0) {
+        rtas_st(rets, 0, RTAS_OUT_SUCCESS);
+    } else {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+    }
+}
+
+static void rtas_ibm_slot_error_detail(PowerPCCPU *cpu,
+                                       sPAPREnvironment *spapr,
+                                       uint32_t token, uint32_t nargs,
+                                       target_ulong args, uint32_t nret,
+                                       target_ulong rets)
+{
+    int option;
+
+    /* To support it later */
+    if ((nargs != 8) || (nret != 1)) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    option = rtas_ld(args, 7);
+    if (option != 1 && option != 2) {
+        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
+        return;
+    }
+
+    rtas_st(rets, 0, 0);
+}
+
 static int pci_spapr_swizzle(int slot, int pin)
 {
     return (slot + pin) % PCI_NUM_PINS;
@@ -941,6 +1156,19 @@ void spapr_pci_rtas_init(void)
                             rtas_ibm_query_interrupt_source_number);
         spapr_rtas_register("ibm,change-msi", rtas_ibm_change_msi);
     }
+
+    spapr_rtas_register("ibm,set-eeh-option",
+                        rtas_ibm_set_eeh_option);
+    spapr_rtas_register("ibm,get-config-addr-info2",
+                        rtas_ibm_get_config_addr_info2);
+    spapr_rtas_register("ibm,read-slot-reset-state2",
+                        rtas_ibm_read_slot_reset_state2);
+    spapr_rtas_register("ibm,set-slot-reset",
+                        rtas_ibm_set_slot_reset);
+    spapr_rtas_register("ibm,configure-pe",
+                        rtas_ibm_configure_pe);
+    spapr_rtas_register("ibm,slot-error-detail",
+                        rtas_ibm_slot_error_detail);
 }
 
 static void spapr_pci_register_types(void)
-- 
1.8.3.2