[Qemu-ppc] [PATCH 7/9] spapr: Limit threads per core according to current compatibility mode

[Alexey Kardashevskiy]

This puts a limit to the number of threads per core based on the current
compatibility mode. Although PowerISA specs do not specify the maximum
threads per core number, the linux guest still expects that
PowerISA2.05-compatible CPU supports only 2 threads per core as this
is what POWER6 (2.05 compliant CPU) implements, same is true for
POWER7 (2.06, 4 threads) and POWER8 (2.07, 8 threads).

Signed-off-by: Alexey Kardashevskiy <address@hidden>
---
 hw/ppc/spapr.c | 31 ++++++++++++++++++++++++++++---
 1 file changed, 28 insertions(+), 3 deletions(-)

diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index cf53a7a..a2c9106 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -34,6 +34,7 @@
 #include "sysemu/kvm.h"
 #include "kvm_ppc.h"
 #include "mmu-hash64.h"
+#include "cpu-models.h"
 
 #include "hw/boards.h"
 #include "hw/ppc/ppc.h"
@@ -203,6 +204,29 @@ static XICSState *xics_system_init(int nr_servers, int 
nr_irqs)
     return icp;
 }
 
+static int spapr_get_compat_smp_threads(PowerPCCPU *cpu)
+{
+    int ret = -1;
+
+    switch (cpu->cpu_version) {
+    case CPU_POWERPC_LOGICAL_2_05:
+        ret = 2;
+        break;
+    case CPU_POWERPC_LOGICAL_2_06:
+        ret = 4;
+        break;
+    case CPU_POWERPC_LOGICAL_2_07:
+        ret = 8;
+        break;
+    default:
+        ret = smp_threads;
+        break;
+    }
+    ret = MIN(ret, smp_threads);
+
+    return ret;
+}
+
 static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr)
 {
     int ret = 0, offset;
@@ -221,8 +245,9 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment 
*spapr)
                                     cpu_to_be32(0x0),
                                     cpu_to_be32(cpu->numa_node),
                                     cpu_to_be32(index)};
-        uint32_t servers_prop[smp_threads];
-        uint32_t gservers_prop[smp_threads * 2];
+        int smpt = spapr_get_compat_smp_threads(pcpu);
+        uint32_t servers_prop[smpt];
+        uint32_t gservers_prop[smpt * 2];
         int i;
 
         if ((index % smt) != 0) {
@@ -260,7 +285,7 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment 
*spapr)
         }
 
         /* Build interrupt servers and gservers properties */
-        for (i = 0; i < smp_threads; i++) {
+        for (i = 0; i < smpt; i++) {
             servers_prop[i] = cpu_to_be32(index + i);
             /* Hack, direct the group queues back to cpu 0 */
             gservers_prop[i*2] = cpu_to_be32(index + i);
-- 
1.9.rc0