[Qemu-ppc] [PATCH 5/6] sPAPR: Support EEH RTAS services

[Gavin Shan]

The patch registers EEH RTAS services, which are emulated with the
help of vfio_eeh_handler() that was introduced in the previous
patch.

Signed-off-by: Gavin Shan <address@hidden>
---
 hw/ppc/spapr_pci.c | 200 +++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 200 insertions(+)

diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 815e378..0a3a7cc 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -22,6 +22,7 @@
  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  * THE SOFTWARE.
  */
+#include <linux/vfio.h>
 #include "hw/hw.h"
 #include "hw/pci/pci.h"
 #include "hw/pci/msi.h"
@@ -29,6 +30,7 @@
 #include "hw/pci/pci_host.h"
 #include "hw/ppc/spapr.h"
 #include "hw/pci-host/spapr.h"
+#include "hw/misc/vfio.h"
 #include "exec/address-spaces.h"
 #include <libfdt.h>
 #include "trace.h"
@@ -422,6 +424,191 @@ static void 
rtas_ibm_query_interrupt_source_number(PowerPCCPU *cpu,
     rtas_st(rets, 2, 1);/* 0 == level; 1 == edge */
 }
 
+static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu,
+                                    sPAPREnvironment *spapr,
+                                    uint32_t token, uint32_t nargs,
+                                    target_ulong args, uint32_t nret,
+                                    target_ulong rets)
+{
+    struct vfio_eeh_info info;
+    int ret;
+
+    info.argsz = sizeof(info);
+    info.op = VFIO_EEH_OP_SET_OPTION;
+    if ((nargs != 4) || (nret != 1)) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    info.option.buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    info.option.addr = rtas_ld(args, 0);
+    info.option.option = rtas_ld(args, 3);
+    if (info.option.option > 3) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    ret = vfio_eeh_handler(&info);
+    if (ret < 0) {
+        ret = -1;
+    } else if (ret > 0) {
+        ret = -ret;
+    }
+    rtas_st(rets, 0, ret);
+}
+
+static void rtas_ibm_get_config_addr_info2(PowerPCCPU *cpu,
+                                           sPAPREnvironment *spapr,
+                                           uint32_t token, uint32_t nargs,
+                                           target_ulong args, uint32_t nret,
+                                           target_ulong rets)
+{
+    struct vfio_eeh_info info;
+    int ret;
+
+    info.argsz = sizeof(info);
+    info.op = VFIO_EEH_OP_GET_ADDR;
+    if ((nargs != 4) || (nret != 2)) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    info.addr.buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    info.addr.cfg_addr = rtas_ld(args, 0);
+    info.addr.option = rtas_ld(args, 3);
+    if (info.addr.option != 0 && info.addr.option != 1) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    ret = vfio_eeh_handler(&info);
+    if (ret < 0) {
+        ret = -3;
+    } else if (ret > 0) {
+        ret = -ret;
+    } else {
+        rtas_st(rets, 1, info.addr.ret);
+    }
+    rtas_st(rets, 0, ret);
+}
+
+static void rtas_ibm_read_slot_reset_state2(PowerPCCPU *cpu,
+                                            sPAPREnvironment *spapr,
+                                            uint32_t token, uint32_t nargs,
+                                            target_ulong args, uint32_t nret,
+                                            target_ulong rets)
+{
+    struct vfio_eeh_info info;
+    int ret;
+
+    info.argsz = sizeof(info);
+    info.op = VFIO_EEH_OP_GET_STATE;
+    if ((nargs != 3) || (nret != 4 && nret != 5)) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    info.state.buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    info.state.pe_addr = rtas_ld(args, 0);
+    ret = vfio_eeh_handler(&info);
+
+    if (ret < 0) {
+        ret = -3;
+    } else if (ret > 0) {
+        ret = -ret;
+    } else {
+        rtas_st(rets, 1, info.state.state);
+        rtas_st(rets, 2, 1);
+        rtas_st(rets, 3, 1000);
+    }
+    rtas_st(rets, 0, ret);
+}
+
+static void rtas_ibm_set_slot_reset(PowerPCCPU *cpu,
+                                    sPAPREnvironment *spapr,
+                                    uint32_t token, uint32_t nargs,
+                                    target_ulong args, uint32_t nret,
+                                    target_ulong rets)
+{
+    struct vfio_eeh_info info;
+    int ret;
+
+    info.argsz = sizeof(info);
+    info.op = VFIO_EEH_OP_PE_RESET;
+    if ((nargs != 4) || (nret != 1)) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    info.reset.buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    info.reset.pe_addr = rtas_ld(args, 0);
+    info.reset.option = rtas_ld(args, 3);
+    if (info.reset.option != 0 &&
+        info.reset.option != 1 &&
+        info.reset.option != 3) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    ret = vfio_eeh_handler(&info);
+    if (ret < 0 ) {
+        ret = -3;
+    } else if (ret > 0) {
+        ret = -ret;
+    }
+    rtas_st(rets, 0, ret);
+}
+
+static void rtas_ibm_configure_pe(PowerPCCPU *cpu,
+                                  sPAPREnvironment *spapr,
+                                  uint32_t token, uint32_t nargs,
+                                  target_ulong args, uint32_t nret,
+                                  target_ulong rets)
+{
+    struct vfio_eeh_info info;
+    int ret;
+
+    info.argsz = sizeof(info);
+    info.op = VFIO_EEH_OP_PE_CONFIG;
+    if ((nargs != 3) || (nret != 1)) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    info.config.buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2);
+    info.config.pe_addr = rtas_ld(args, 0);
+    ret = vfio_eeh_handler(&info);
+    if (ret < 0) {
+        ret = -3;
+    } else if (ret > 0) {
+        ret = -ret;
+    }
+    rtas_st(rets, 0, ret);
+}
+
+static void rtas_ibm_slot_error_detail(PowerPCCPU *cpu,
+                                       sPAPREnvironment *spapr,
+                                       uint32_t token, uint32_t nargs,
+                                       target_ulong args, uint32_t nret,
+                                       target_ulong rets)
+{
+    int option;
+
+    /* To support it later */
+    if ((nargs != 8) || (nret != 1)) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    option = rtas_ld(args, 7);
+    if (option != 1 && option != 2) {
+        rtas_st(rets, 0, -3);
+        return;
+    }
+
+    rtas_st(rets, 0, 0);
+}
+
 static int pci_spapr_swizzle(int slot, int pin)
 {
     return (slot + pin) % PCI_NUM_PINS;
@@ -942,6 +1129,19 @@ void spapr_pci_rtas_init(void)
                             rtas_ibm_query_interrupt_source_number);
         spapr_rtas_register("ibm,change-msi", rtas_ibm_change_msi);
     }
+
+    spapr_rtas_register("ibm,set-eeh-option",
+                        rtas_ibm_set_eeh_option);
+    spapr_rtas_register("ibm,get-config-addr-info2",
+                        rtas_ibm_get_config_addr_info2);
+    spapr_rtas_register("ibm,read-slot-reset-state2",
+                        rtas_ibm_read_slot_reset_state2);
+    spapr_rtas_register("ibm,set-slot-reset",
+                        rtas_ibm_set_slot_reset);
+    spapr_rtas_register("ibm,configure-pe",
+                        rtas_ibm_configure_pe);
+    spapr_rtas_register("ibm,slot-error-detail",
+                        rtas_ibm_slot_error_detail);
 }
 
 static void spapr_pci_register_types(void)
-- 
1.8.3.2