This patch series adds emulation of the PowerPC Decimal Floating Point (DFP)
instructions.
The complete set of DFP instructions defined by the Power ISA is introduced.
The foundation of the emulation code is libdecnumber, a software library that
models DFP
numbers and operations in a manner similar to how softfloat models IEEE Binary
Floating
Point. A subset of the libdecnumber source (from GCC) is dropped into the QEMU
source tree
and modified slightly; only libdecnumber files containing code that is required
to implement
the PowerPC DFP instructions are copied.
The DFP instructions are implemented via helpers. A typical helper does the
following:
- The contents of the source registers (PPC FPRs) are converted to
libdecnumber's
internal representation, the decNumber type. Inputs are either 64 bit
(Long)
or 128 bit (Extended or Quad) densely packed decimal (DPD), depending on
the specific
instruction being emulated.
- A libdecnumber operation is invoked, producing a decNumber result as well
as status
flags.
- A chain of post-processors is executed to convert status flags and/or
input and output
data to PPC status (usually FPSCR bits).
- The decNumber result is converted back to DPD format and written into the
target
FPR(s).
V2:
- modified post-processor handling per Richard Henderson's comments;
eliminated the use
of lists of function pointers, replacing with aggregated, static functions.
- cleaned up int64 to decNumber converter.