[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [PATCH] target-ppc: Use Additional Temporary in stqcx Case
From: |
Tom Musta |
Subject: |
[Qemu-ppc] [PATCH] target-ppc: Use Additional Temporary in stqcx Case |
Date: |
Mon, 24 Feb 2014 08:16:16 -0600 |
Per Alex Graf's suggestion, the recently added case to gen_conditional_store
for stqcx should use an additional temporary when accessing the second
doubleword. This avoids the mutation of the EA argument to the function,
which is counter intuitive.
Signed-off-by: Tom Musta <address@hidden>
---
target-ppc/translate.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 4ffb891..908264f 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -3333,7 +3333,7 @@ static void gen_conditional_store(DisasContext *ctx, TCGv
EA,
gen_qemu_st16(ctx, cpu_gpr[reg], EA);
#if defined(TARGET_PPC64)
} else if (size == 16) {
- TCGv gpr1, gpr2;
+ TCGv gpr1, gpr2 , EA8;
if (unlikely(ctx->le_mode)) {
gpr1 = cpu_gpr[reg+1];
gpr2 = cpu_gpr[reg];
@@ -3342,8 +3342,10 @@ static void gen_conditional_store(DisasContext *ctx,
TCGv EA,
gpr2 = cpu_gpr[reg+1];
}
gen_qemu_st64(ctx, gpr1, EA);
- gen_addr_add(ctx, EA, EA, 8);
- gen_qemu_st64(ctx, gpr2, EA);
+ EA8 = tcg_temp_local_new();
+ gen_addr_add(ctx, EA8, EA, 8);
+ gen_qemu_st64(ctx, gpr2, EA8);
+ tcg_temp_free(EA8);
#endif
} else {
gen_qemu_st8(ctx, cpu_gpr[reg], EA);
--
1.7.1
- [Qemu-ppc] [PATCH] target-ppc: Use Additional Temporary in stqcx Case,
Tom Musta <=