[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-ppc] [V3 PATCH 1/9] target-ppc: Add Flag for bctar
From: |
Tom Musta |
Subject: |
[Qemu-ppc] [V3 PATCH 1/9] target-ppc: Add Flag for bctar |
Date: |
Mon, 10 Feb 2014 11:26:53 -0600 |
This patch adds a flag for the bctar instruction. This instruction
is being introduced via Power ISA 2.07.
Also, the flag is added to the Power8 machine model since the P8
processor supports this instruction.
Signed-off-by: Tom Musta <address@hidden>
---
target-ppc/cpu.h | 6 ++++--
target-ppc/translate_init.c | 2 +-
2 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 2b8c205..b9d6b10 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -1887,12 +1887,14 @@ enum {
PPC2_FP_CVT_ISA206 = 0x0000000000000400ULL,
/* ISA 2.06B floating point test instructions */
PPC2_FP_TST_ISA206 = 0x0000000000000800ULL,
-
+ /* ISA 2.07 bctar instruction */
+ PPC2_BCTAR_ISA207 = 0x0000000000001000ULL,
#define PPC_TCG_INSNS2 (PPC2_BOOKE206 | PPC2_VSX | PPC2_PRCNTL | PPC2_DBRX | \
PPC2_ISA205 | PPC2_VSX207 | PPC2_PERM_ISA206 | \
PPC2_DIVE_ISA206 | PPC2_ATOMIC_ISA206 | \
- PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206)
+ PPC2_FP_CVT_ISA206 | PPC2_FP_TST_ISA206 | \
+ PPC2_BCTAR_ISA207)
};
/*****************************************************************************/
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index a83c964..62bb200 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -7327,7 +7327,7 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data)
pcc->insns_flags2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX |
PPC2_PERM_ISA206 | PPC2_DIVE_ISA206 |
PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206 |
- PPC2_FP_TST_ISA206;
+ PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207;
pcc->msr_mask = 0x800000000284FF36ULL;
pcc->mmu_model = POWERPC_MMU_2_06;
#if defined(CONFIG_SOFTMMU)
--
1.7.1
- [Qemu-ppc] [V3 PATCH 0/9] target-ppc: Base ISA V2.07 for Power8, Tom Musta, 2014/02/10
- [Qemu-ppc] [V3 PATCH 2/9] target-ppc: Add Target Address SPR (TAR) to Power8, Tom Musta, 2014/02/10
- [Qemu-ppc] [V3 PATCH 1/9] target-ppc: Add Flag for bctar,
Tom Musta <=
- [Qemu-ppc] [V3 PATCH 3/9] target-ppc: Add bctar Instruction, Tom Musta, 2014/02/10
- [Qemu-ppc] [V3 PATCH 4/9] target-ppc: Add Flag for ISA 2.07 Load/Store Quadword Instructions, Tom Musta, 2014/02/10
- [Qemu-ppc] [V3 PATCH 8/9] target-ppc: Add Load Quadword and Reserve, Tom Musta, 2014/02/10
- [Qemu-ppc] [V3 PATCH 7/9] target-ppc: Store Quadword, Tom Musta, 2014/02/10
- [Qemu-ppc] [V3 PATCH 5/9] target-ppc: Add is_user_mode Utility Routine, Tom Musta, 2014/02/10
- [Qemu-ppc] [V3 PATCH 6/9] target-ppc: Load Quadword, Tom Musta, 2014/02/10
- [Qemu-ppc] [V3 PATCH 9/9] target-ppc: Add Store Quadword Conditional, Tom Musta, 2014/02/10
- Re: [Qemu-ppc] [V3 PATCH 0/9] target-ppc: Base ISA V2.07 for Power8, Alexander Graf, 2014/02/20