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Re: [Qemu-ppc] [PATCH 3/8] target-ppc: Add bctar Instruction
From: |
Alexander Graf |
Subject: |
Re: [Qemu-ppc] [PATCH 3/8] target-ppc: Add bctar Instruction |
Date: |
Mon, 27 Jan 2014 19:46:14 +0100 |
On 27.01.2014, at 18:54, Tom Musta <address@hidden> wrote:
> This patch adds the Branch Conditional to Address Register (bctar)
> instruction.
>
> Signed-off-by: Tom Musta <address@hidden>
> ---
> target-ppc/translate.c | 11 ++++++++++-
> 1 files changed, 10 insertions(+), 1 deletions(-)
>
> diff --git a/target-ppc/translate.c b/target-ppc/translate.c
> index f245946..90cbb72 100644
> --- a/target-ppc/translate.c
> +++ b/target-ppc/translate.c
> @@ -3748,6 +3748,7 @@ static void gen_b(DisasContext *ctx)
> #define BCOND_IM 0
> #define BCOND_LR 1
> #define BCOND_CTR 2
> +#define BCOND_TAR 3
>
> static inline void gen_bcond(DisasContext *ctx, int type)
> {
> @@ -3756,10 +3757,12 @@ static inline void gen_bcond(DisasContext *ctx, int
> type)
> TCGv target;
>
> ctx->exception = POWERPC_EXCP_BRANCH;
> - if (type == BCOND_LR || type == BCOND_CTR) {
> + if (type == BCOND_LR || type == BCOND_CTR || type == BCOND_TAR) {
> target = tcg_temp_local_new();
> if (type == BCOND_CTR)
> tcg_gen_mov_tl(target, cpu_ctr);
> + else if (type == BCOND_TAR)
> + gen_load_spr(target, SPR_TAR);
How frequently is this used in generated code? Would it make sense to make it a
global TCG variable?
Alex
> else
> tcg_gen_mov_tl(target, cpu_lr);
> } else {
> @@ -3841,6 +3844,11 @@ static void gen_bclr(DisasContext *ctx)
> gen_bcond(ctx, BCOND_LR);
> }
>
> +static void gen_bctar(DisasContext *ctx)
> +{
> + gen_bcond(ctx, BCOND_TAR);
> +}
> +
> /*** Condition register logical
> ***/
> #define GEN_CRLOGIC(name, tcg_op, opc)
> \
> static void glue(gen_, name)(DisasContext *ctx)
> \
> @@ -9540,6 +9548,7 @@ GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW),
> GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW),
> GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW),
> GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW),
> +GEN_HANDLER_E(bctar, 0x13, 0x10, 0x11, 0, PPC_NONE, PPC2_BCTAR_ISA207),
> GEN_HANDLER(mcrf, 0x13, 0x00, 0xFF, 0x00000001, PPC_INTEGER),
> GEN_HANDLER(rfi, 0x13, 0x12, 0x01, 0x03FF8001, PPC_FLOW),
> #if defined(TARGET_PPC64)
> --
> 1.7.1
>
>
[Qemu-ppc] [PATCH 8/8] target-ppc: Add Store Quadword Conditional, Tom Musta, 2014/01/27
[Qemu-ppc] [PATCH 6/8] target-ppc: Store Quadword, Tom Musta, 2014/01/27
[Qemu-ppc] [PATCH 7/8] target-ppc: Add Load Quadword and Reserve, Tom Musta, 2014/01/27