Re: [Qemu-ppc] [PATCH 1/2] PPC: Add dump_mmu() for 6xx

[Alexander Graf]

On 18.06.2013, at 16:53, Fabien Chouteau wrote:

> "(qemu) info tlb" is a very useful tool for debugging, so I implemented
> the missing 6xx version.
> 
> Signed-off-by: Fabien Chouteau <address@hidden>
> ---
> target-ppc/mmu_helper.c |   39 +++++++++++++++++++++++++++++++++++++++
> 1 file changed, 39 insertions(+)
> 
> diff --git a/target-ppc/mmu_helper.c b/target-ppc/mmu_helper.c
> index 68d5415..910e022 100644
> --- a/target-ppc/mmu_helper.c
> +++ b/target-ppc/mmu_helper.c
> @@ -1176,6 +1176,41 @@ static void mmubooke206_dump_mmu(FILE *f, 
> fprintf_function cpu_fprintf,
>     }
> }
> 
> +static void mmu6xx_dump_mmu(FILE *f, fprintf_function cpu_fprintf,
> +                            CPUPPCState *env)
> +{
> +    ppc6xx_tlb_t *tlb;
> +
> +    int type, way, entry;
> +
> +    if (kvm_enabled() && !env->kvm_sw_tlb) {

Please just drop the check for kvm_sw_tlb. Today it's semantically only used on 
e500 CPUs. I wouldn't like to draw any assumptions into QEMU code that KVM 
doesn't fulfill yet :).

if (kvm_enabled()) {

> +        cpu_fprintf(f, "Cannot access KVM TLB\n");
> +        return;
> +    }
> +
> +    if (env->id_tlbs != 1) {
> +        cpu_fprintf(f, "ERROR: 6xx MMU should have separated TLB"
> +                    " for code and data\n");
> +    }
> +
> +    cpu_fprintf(f, "                           [EPN    EPN + SIZE]\n");
> +
> +    for (type = 0; type < 2; type++)

You need braces on these. Please run your patch through checkpatch.pl :).

> +        for (way = 0; way < env->nb_ways; way++)
> +            for (entry = env->nb_tlb * type + env->tlb_per_way * way;
> +                 entry < (env->nb_tlb * type + env->tlb_per_way * (way + 1));
> +                 entry++) {
> +
> +                tlb = &env->tlb.tlb6[entry];
> +                cpu_fprintf(f, "TLB %02d/%02d %s way:%d %s ["
> +                            TARGET_FMT_lx " " TARGET_FMT_lx "]\n",
> +                            entry % env->nb_tlb, env->nb_tlb,
> +                            type ? "code" : "data", way,
> +                            pte_is_valid(tlb->pte0) ? "valid" : "inval",
> +                            tlb->EPN, tlb->EPN + TARGET_PAGE_SIZE);
> +            }

I thought 6xx and 74xx also support HTAB and SRs? Shouldn't we dump those as 
well?


Alex

> +}
> +
> void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUPPCState *env)
> {
>     switch (env->mmu_model) {
> @@ -1185,6 +1220,10 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, 
> CPUPPCState *env)
>     case POWERPC_MMU_BOOKE206:
>         mmubooke206_dump_mmu(f, cpu_fprintf, env);
>         break;
> +    case POWERPC_MMU_SOFT_6xx:
> +    case POWERPC_MMU_SOFT_74xx:
> +        mmu6xx_dump_mmu(f, cpu_fprintf, env);
> +        break;
> #if defined(TARGET_PPC64)
>     case POWERPC_MMU_64B:
>     case POWERPC_MMU_2_06:
> -- 
> 1.7.9.5
>