Re: [Qemu-ppc] [Qemu-devel] Incorrect handling of more PPC64 insns (PATCH)

[Torbjorn Granlund]

Aurelien Jarno <address@hidden> writes:

  64-bit CPUs check for the L bit of comparison instruction to determine
  if the instruction is 32-bit wide, and not to the MSR SF bit.
  
  L=1 on a 32-bit CPU should generate an invalid instruction exception.
  
No.  See my previous post.

The L bit is to be ignored for 32-bit CPUs, just like the original code
did.

-- 
Torbjörn