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[Qemu-ppc] [PATCH 29/32] mmu-hash64: Clean up PTE flags update


From: David Gibson
Subject: [Qemu-ppc] [PATCH 29/32] mmu-hash64: Clean up PTE flags update
Date: Fri, 15 Feb 2013 19:01:19 +1100

Currently the ppc_hash64_pte_update_flags() helper function updates a PTE's
referenced and changed bits as necessary to reflect the access.  It is
somewhat long winded, though.  This patch open codes it in the (single)
caller in a simpler way.

Signed-off-by: David Gibson <address@hidden>
---
 target-ppc/mmu-hash64.c |   49 +++++++++++++++--------------------------------
 1 file changed, 15 insertions(+), 34 deletions(-)

diff --git a/target-ppc/mmu-hash64.c b/target-ppc/mmu-hash64.c
index 814c7bf..77b3455 100644
--- a/target-ppc/mmu-hash64.c
+++ b/target-ppc/mmu-hash64.c
@@ -279,32 +279,6 @@ static int ppc_hash64_pte_prot(CPUPPCState *env,
     return prot;
 }
 
-static int ppc_hash64_pte_update_flags(struct mmu_ctx_hash64 *ctx,
-                                       target_ulong *pte1p,
-                                       int ret, int rw)
-{
-    int store = 0;
-
-    /* Update page flags */
-    if (!(*pte1p & HPTE_R_R)) {
-        /* Update accessed flag */
-        *pte1p |= HPTE_R_R;
-        store = 1;
-    }
-    if (!(*pte1p & HPTE_R_C)) {
-        if (rw == 1 && ret == 0) {
-            /* Update changed flag */
-            *pte1p |= HPTE_R_C;
-            store = 1;
-        } else {
-            /* Force page fault for first write access */
-            ctx->prot &= ~PAGE_WRITE;
-        }
-    }
-
-    return store;
-}
-
 static hwaddr ppc_hash64_pteg_search(CPUPPCState *env, hwaddr pteg_off,
                                      bool secondary, target_ulong ptem,
                                      ppc_hash_pte64_t *pte)
@@ -390,10 +364,10 @@ static hwaddr ppc_hash64_htab_lookup(CPUPPCState *env,
 static int ppc_hash64_translate(CPUPPCState *env, struct mmu_ctx_hash64 *ctx,
                                 target_ulong eaddr, int rwx)
 {
-    int ret;
     ppc_slb_t *slb;
     hwaddr pte_offset;
     ppc_hash_pte64_t pte;
+    uint64_t new_pte1;
     int target_page_bits;
     const int need_prot[] = {PAGE_READ, PAGE_WRITE, PAGE_EXEC};
 
@@ -439,19 +413,25 @@ static int ppc_hash64_translate(CPUPPCState *env, struct 
mmu_ctx_hash64 *ctx,
         return -2;
     }
 
-    ret = 0;
-
     LOG_MMU("PTE access granted !\n");
 
     /* 6. Update PTE referenced and changed bits if necessary */
 
-    ctx->raddr = pte.pte1;
+    new_pte1 = pte.pte1 | HPTE_R_R; /* set referenced bit */
+    if (rwx == 1) {
+        new_pte1 |= HPTE_R_C; /* set changed (dirty) bit */
+    } else {
+        /* Treat the page as read-only for now, so that a later write
+         * will pass through this function again to set the C bit */
+        ctx->prot &= ~PAGE_WRITE;
+    }
 
-    /* Update page flags */
-    if (ppc_hash64_pte_update_flags(ctx, &pte.pte1, ret, rwx) == 1) {
-        ppc_hash64_store_hpte1(env, pte_offset, pte.pte1);
+    if (new_pte1 != pte.pte1) {
+        ppc_hash64_store_hpte1(env, pte_offset, new_pte1);
     }
 
+    ctx->raddr = pte.pte1;
+
     /* We have a TLB that saves 4K pages, so let's
      * split a huge page to 4k chunks */
     target_page_bits = (slb->vsid & SLB_VSID_L)
@@ -460,7 +440,8 @@ static int ppc_hash64_translate(CPUPPCState *env, struct 
mmu_ctx_hash64 *ctx,
         ctx->raddr |= (eaddr & ((1 << target_page_bits) - 1))
                       & TARGET_PAGE_MASK;
     }
-    return ret;
+
+    return 0;
 }
 
 hwaddr ppc_hash64_get_phys_page_debug(CPUPPCState *env, target_ulong addr)
-- 
1.7.10.4




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