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[Qemu-ppc] [PATCH 06/40] pseries: Split xics irq configuration from stat
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 06/40] pseries: Split xics irq configuration from state information |
Date: |
Fri, 14 Dec 2012 13:13:22 +0100 |
From: David Gibson <address@hidden>
Currently the XICS irq controller code has a per-irq state structure which
amongst other things includes whether the interrupt is level or message
triggered - this is configured by the platform code, and is not directly
visible to the guest. This leads to a slightly awkward construct at reset
time where we need to reset everything in the state structure _except_ the
lsi/msi flag, which needs to retain the information given at platform init
time.
More importantly this flag will make matching the qemu state to the KVM
state for the upcoming in-kernel XICS implementation more awkward. This
patch, therefore, removes this flag from the per-irq state structure,
instead adding a parallel array giving the lsi/msi configuration per irq.
Signed-off-by: David Gibson <address@hidden>
Signed-off-by: Alexander Graf <address@hidden>
---
hw/xics.c | 20 ++++++++------------
1 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/hw/xics.c b/hw/xics.c
index 33f99c7..55899ce 100644
--- a/hw/xics.c
+++ b/hw/xics.c
@@ -179,13 +179,13 @@ struct ics_irq_state {
#define XICS_STATUS_REJECTED 0x4
#define XICS_STATUS_MASKED_PENDING 0x8
uint8_t status;
- bool lsi;
};
struct ics_state {
int nr_irqs;
int offset;
qemu_irq *qirqs;
+ bool *islsi;
struct ics_irq_state *irqs;
struct icp_state *icp;
};
@@ -254,9 +254,8 @@ static void set_irq_lsi(struct ics_state *ics, int srcno,
int val)
static void ics_set_irq(void *opaque, int srcno, int val)
{
struct ics_state *ics = (struct ics_state *)opaque;
- struct ics_irq_state *irq = ics->irqs + srcno;
- if (irq->lsi) {
+ if (ics->islsi[srcno]) {
set_irq_lsi(ics, srcno, val);
} else {
set_irq_msi(ics, srcno, val);
@@ -293,7 +292,7 @@ static void ics_write_xive(struct ics_state *ics, int nr,
int server,
trace_xics_ics_write_xive(nr, srcno, server, priority);
- if (irq->lsi) {
+ if (ics->islsi[srcno]) {
write_xive_lsi(ics, srcno);
} else {
write_xive_msi(ics, srcno);
@@ -314,10 +313,8 @@ static void ics_resend(struct ics_state *ics)
int i;
for (i = 0; i < ics->nr_irqs; i++) {
- struct ics_irq_state *irq = ics->irqs + i;
-
/* FIXME: filter by server#? */
- if (irq->lsi) {
+ if (ics->islsi[i]) {
resend_lsi(ics, i);
} else {
resend_msi(ics, i);
@@ -332,7 +329,7 @@ static void ics_eoi(struct ics_state *ics, int nr)
trace_xics_ics_eoi(nr);
- if (irq->lsi) {
+ if (ics->islsi[srcno]) {
irq->status &= ~XICS_STATUS_SENT;
}
}
@@ -354,7 +351,7 @@ void xics_set_irq_type(struct icp_state *icp, int irq, bool
lsi)
{
assert(ics_valid_irq(icp->ics, irq));
- icp->ics->irqs[irq - icp->ics->offset].lsi = lsi;
+ icp->ics->islsi[irq - icp->ics->offset] = lsi;
}
static target_ulong h_cppr(PowerPCCPU *cpu, sPAPREnvironment *spapr,
@@ -518,10 +515,8 @@ static void xics_reset(void *opaque)
qemu_set_irq(icp->ss[i].output, 0);
}
+ memset(ics->irqs, 0, sizeof(struct ics_irq_state) * ics->nr_irqs);
for (i = 0; i < ics->nr_irqs; i++) {
- /* Reset everything *except* the type */
- ics->irqs[i].server = 0;
- ics->irqs[i].status = 0;
ics->irqs[i].priority = 0xff;
ics->irqs[i].saved_priority = 0xff;
}
@@ -568,6 +563,7 @@ struct icp_state *xics_system_init(int nr_irqs)
ics->nr_irqs = nr_irqs;
ics->offset = XICS_IRQ_BASE;
ics->irqs = g_malloc0(nr_irqs * sizeof(struct ics_irq_state));
+ ics->islsi = g_malloc0(nr_irqs * sizeof(bool));
icp->ics = ics;
ics->icp = icp;
--
1.6.0.2
- [Qemu-ppc] [PATCH 38/40] PPC: e500: pci: Export slot2irq calculation, (continued)
- [Qemu-ppc] [PATCH 38/40] PPC: e500: pci: Export slot2irq calculation, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 28/40] PPC: e500: Add MSI support, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 20/40] openpic: unify memory api subregions, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 36/40] PPC: E500: Move PCI slot information into params, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 24/40] openpic: remove irq_out, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 02/40] pseries: Use #define for XICS base irq number, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 16/40] openpic: Convert subregions to memory api, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 07/40] pseries: Implement PAPR NVRAM, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 31/40] openpic: fix minor coding style issues, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 15/40] openpic: combine mpic and openpic src handlers, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 06/40] pseries: Split xics irq configuration from state information,
Alexander Graf <=
- [Qemu-ppc] [PATCH 37/40] PPC: E500plat: Make a lot of PCI slots available, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 12/40] openpic: Remove unused code, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 29/40] PPC: e500: Declare pci bridge as bridge, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 39/40] target-ppc: Don't use hwaddr to represent hardware state, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 03/40] pseries: Return the token when we register an RTAS call, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 32/40] openpic: Accelerate pending irq search, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 17/40] openpic: combine mpic and openpic irq raise functions, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 01/40] pseries: Fix incorrect initialization of interrupt controller, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 33/40] PPC: E500: PCI: Make first slot qdev settable, Alexander Graf, 2012/12/14
- [Qemu-ppc] [PATCH 05/40] pseries: Add tracepoints to the XICS interrupt controller, Alexander Graf, 2012/12/14