Re: [Qemu-ppc] [PATCH 26/31] PPC: e500: Use new MPIC dt format

[Blue Swirl]

On Tue, Jun 5, 2012 at 11:53 PM, Alexander Graf <address@hidden> wrote:
> Due to popular demand, we're updating the way we generate the MPIC
> node and interrupt lines based on what the current state of art is.
>
> Requested-by: Scott Wood <address@hidden>
> Signed-off-by: Alexander Graf <address@hidden>
> ---
>  hw/ppce500_mpc8544ds.c |   33 ++++++++++++++++++---------------
>  roms/openbios          |    2 +-
>  2 files changed, 19 insertions(+), 16 deletions(-)
>
> diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
> index bad114c..35b470a 100644
> --- a/hw/ppce500_mpc8544ds.c
> +++ b/hw/ppce500_mpc8544ds.c
> @@ -67,18 +67,18 @@ static void pci_map_create(void *fdt, uint32_t *pci_map, 
> uint32_t mpic)
>     int i;
>     const uint32_t tmp[] = {
>                              /* IDSEL 0x11 J17 Slot 1 */
> -                             0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1,
> -                             0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1,
> -                             0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1,
> -                             0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
> +                             0x8800, 0x0, 0x0, 0x1, mpic, 0x2, 0x1, 0x0, 0x0,
> +                             0x8800, 0x0, 0x0, 0x2, mpic, 0x3, 0x1, 0x0, 0x0,
> +                             0x8800, 0x0, 0x0, 0x3, mpic, 0x4, 0x1, 0x0, 0x0,
> +                             0x8800, 0x0, 0x0, 0x4, mpic, 0x1, 0x1, 0x0, 0x0,
>
>                              /* IDSEL 0x12 J16 Slot 2 */
> -                             0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1,
> -                             0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1,
> -                             0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1,
> -                             0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1,
> +                             0x9000, 0x0, 0x0, 0x1, mpic, 0x3, 0x1, 0x0, 0x0,
> +                             0x9000, 0x0, 0x0, 0x2, mpic, 0x4, 0x1, 0x0, 0x0,
> +                             0x9000, 0x0, 0x0, 0x3, mpic, 0x2, 0x1, 0x0, 0x0,
> +                             0x9000, 0x0, 0x0, 0x4, mpic, 0x1, 0x1, 0x0, 0x0,
>                            };
> -    for (i = 0; i < (7 * 8); i++) {
> +    for (i = 0; i < ARRAY_SIZE(tmp); i++) {
>         pci_map[i] = cpu_to_be32(tmp[i]);
>     }
>  }
> @@ -107,7 +107,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>     uint32_t mpic_ph;
>     char gutil[128];
>     char pci[128];
> -    uint32_t pci_map[7 * 8];
> +    uint32_t pci_map[9 * 8];
>     uint32_t pci_ranges[12] = { 0x2000000, 0x0, 0xc0000000, 0xc0000000, 0x0,
>                                 0x20000000, 0x1000000, 0x0, 0x0, 0xe1000000,
>                                 0x0, 0x10000 };
> @@ -249,15 +249,18 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>             MPC8544_MPIC_REGS_BASE - MPC8544_CCSRBAR_BASE);
>     qemu_devtree_add_subnode(fdt, mpic);
>     qemu_devtree_setprop_string(fdt, mpic, "device_type", "open-pic");
> -    qemu_devtree_setprop_string(fdt, mpic, "compatible", "chrp,open-pic");
> +    qemu_devtree_setprop_string(fdt, mpic, "compatible", "fsl,mpic");
>     qemu_devtree_setprop_cell2(fdt, mpic, "reg", MPC8544_MPIC_REGS_BASE -
>                                MPC8544_CCSRBAR_BASE, 0x40000);
>     qemu_devtree_setprop_cell(fdt, mpic, "#address-cells", 0);
> -    qemu_devtree_setprop_cell(fdt, mpic, "#interrupt-cells", 2);
> +    qemu_devtree_setprop_cell(fdt, mpic, "#interrupt-cells", 4);
>     mpic_ph = qemu_devtree_alloc_phandle(fdt);
>     qemu_devtree_setprop_cell(fdt, mpic, "phandle", mpic_ph);
>     qemu_devtree_setprop_cell(fdt, mpic, "linux,phandle", mpic_ph);
>     qemu_devtree_setprop(fdt, mpic, "interrupt-controller", NULL, 0);
> +    qemu_devtree_setprop(fdt, mpic, "big-endian", NULL, 0);
> +    qemu_devtree_setprop(fdt, mpic, "single-cpu-affinity", NULL, 0);
> +    qemu_devtree_setprop_cell(fdt, mpic, "last-interrupt-source", 255);
>
>     /*
>      * We have to generate ser1 first, because Linux takes the first
> @@ -273,7 +276,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>                                MPC8544_CCSRBAR_BASE, 0x100);
>     qemu_devtree_setprop_cell(fdt, ser1, "cell-index", 1);
>     qemu_devtree_setprop_cell(fdt, ser1, "clock-frequency", 0);
> -    qemu_devtree_setprop_cell2(fdt, ser1, "interrupts", 42, 2);
> +    qemu_devtree_setprop_cell4(fdt, ser1, "interrupts", 42, 2, 0, 0);
>     qemu_devtree_setprop_phandle(fdt, ser1, "interrupt-parent", mpic);
>     qemu_devtree_setprop_string(fdt, "/aliases", "serial1", ser1);
>
> @@ -286,7 +289,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>                                MPC8544_CCSRBAR_BASE, 0x100);
>     qemu_devtree_setprop_cell(fdt, ser0, "cell-index", 0);
>     qemu_devtree_setprop_cell(fdt, ser0, "clock-frequency", 0);
> -    qemu_devtree_setprop_cell2(fdt, ser0, "interrupts", 42, 2);
> +    qemu_devtree_setprop_cell4(fdt, ser0, "interrupts", 42, 2, 0, 0);
>     qemu_devtree_setprop_phandle(fdt, ser0, "interrupt-parent", mpic);
>     qemu_devtree_setprop_string(fdt, "/aliases", "serial0", ser0);
>     qemu_devtree_setprop_string(fdt, "/chosen", "linux,stdout-path", ser0);
> @@ -309,7 +312,7 @@ static int mpc8544_load_device_tree(CPUPPCState *env,
>     pci_map_create(fdt, pci_map, qemu_devtree_get_phandle(fdt, mpic));
>     qemu_devtree_setprop(fdt, pci, "interrupt-map", pci_map, sizeof(pci_map));
>     qemu_devtree_setprop_phandle(fdt, pci, "interrupt-parent", mpic);
> -    qemu_devtree_setprop_cell2(fdt, pci, "interrupts", 24, 2);
> +    qemu_devtree_setprop_cell4(fdt, pci, "interrupts", 24, 2, 0, 0);
>     qemu_devtree_setprop_cell2(fdt, pci, "bus-range", 0, 255);
>     for (i = 0; i < 12; i++) {
>         pci_ranges[i] = cpu_to_be32(pci_ranges[i]);
> diff --git a/roms/openbios b/roms/openbios
> index d1d2787..ff61d97 160000
> --- a/roms/openbios
> +++ b/roms/openbios
> @@ -1 +1 @@
> -Subproject commit d1d2787f87167edf487a60e61b9168514d5a7434
> +Subproject commit ff61d973e5a4a68b29e485b3f88e6a2d1d96cf45

This does not look intentional.

> --
> 1.6.0.2
>
>