[Qemu-ppc] IRQ assignments for hw/xilinx_timer.c

[Elvis Dowson]

Hi,
      If I have the following line of code in hw/virtex_ml50.c, and attempt to 
create 2 timers, and #define XPS_TIMER_IRQ 1

xilinx_timer_create(XPS_TIMER_BASEADDR, irq[XPS_TIMER_IRQ], 2, 62 * 1000000);

What IRQ will the second timer have?

My xparameters.h file from the Xilinx hw BSP defines the following:

#define XPAR_XPS_TIMER_0_INTERRUPT_MASK 0X000002
#define XPAR_XPS_INTC_0_XPS_TIMER_0_INTERRUPT_INTR 1
#define XPAR_XPS_TIMEBASE_WDT_0_WDT_INTERRUPT_MASK 0X000004
#define XPAR_XPS_INTC_0_XPS_TIMEBASE_WDT_0_WDT_INTERRUPT_INTR 2
#define XPAR_XPS_TIMEBASE_WDT_0_TIMEBASE_INTERRUPT_MASK 0X000008
#define XPAR_XPS_INTC_0_XPS_TIMEBASE_WDT_0_TIMEBASE_INTERRUPT_INTR 3

Best regards,

Elvis Dowson