Re: [Qemu-ppc] [HelenOS-devel] Regression in ppc-softmmu when running HelenOS

[Alexander Graf]

On 17.03.2012, at 19:09, Mark Cave-Ayland wrote:

> On 17/03/12 17:28, Martin Sucha wrote:
> 
> Hi Martin,
> 
>> Hello Mark,
>> 
>> On Friday 16 March 2012 00:03:21 Mark Cave-Ayland wrote:
>>> Please find attached the latest version of my patch which seems to have
>>> the same behaviour as git master, except that it now also boots HelenOS.
>>> This is based upon the PowerISA reference link you pointed me towards.
>>> I've also clarified the comments to make it clearer where the masks have
>>> been calculated from, plus modified it so (I hope) it will also work on
>>> PPC64.
>>> 
>>> Any feedback/review/testing greatly appreciated.
>> Using (a slightly modified version of) your qemu-ppc-v3.patch:
>> -+    new_msr = env->msr&  ~0xed36ULL&  ~((target_ulong)1<<  MSR_HVB);
>> ++    new_msr = env->msr&  ~0xed36ULL&  ~((target_ulong) MSR_HVB);
> 
> Ah I see - the MSR_HVB constant is already shifted. Good catch!

Sorry for the late reply - I was on vacation for the last almost 4 weeks :).

Either way, the breakage you're seeing is _not_ due to the MSR value exposed to 
the guest OS. It's because we're not flushing the TLB correctly when going into 
real mode. Please try the below patch which should also make things work.


Alex

---

diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index 39dcc27..aef34ac 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -2960,8 +2960,9 @@ static inline void powerpc_excp(CPUPPCState *env, int 
excp_model, int excp)
     if (asrr1 != -1)
         env->spr[asrr1] = env->spr[srr1];
     /* If we disactivated any translation, flush TLBs */
-    if (new_msr & ((1 << MSR_IR) | (1 << MSR_DR)))
+    if (msr & ((1 << MSR_IR) | (1 << MSR_DR))) {
         tlb_flush(env, 1);
+    }
 
     if (msr_ile) {
         new_msr |= (target_ulong)1 << MSR_LE;