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[Qemu-ppc] [PATCH 09/21] PPC: booke206: Check for min/max TLB entry size
From: |
Alexander Graf |
Subject: |
[Qemu-ppc] [PATCH 09/21] PPC: booke206: Check for min/max TLB entry size |
Date: |
Thu, 2 Feb 2012 02:49:32 +0100 |
When setting a TLB entry, we need to check if the TLB we're putting it in
actually supports the given size. According to the 2.06 PowerPC ISA, a
value that's out of range can either be redefined to something implementation
dependent or we can raise an illegal opcode exception. We do the latter.
Signed-off-by: Alexander Graf <address@hidden>
---
target-ppc/op_helper.c | 11 +++++++++++
1 files changed, 11 insertions(+), 0 deletions(-)
diff --git a/target-ppc/op_helper.c b/target-ppc/op_helper.c
index 6339c95..3b197f2 100644
--- a/target-ppc/op_helper.c
+++ b/target-ppc/op_helper.c
@@ -4228,6 +4228,7 @@ void helper_booke206_tlbwe(void)
{
uint32_t tlbncfg, tlbn;
ppcmas_tlb_t *tlb;
+ uint32_t size_tlb, size_ps;
switch (env->spr[SPR_BOOKE_MAS0] & MAS0_WQ_MASK) {
case MAS0_WQ_ALWAYS:
@@ -4259,6 +4260,16 @@ void helper_booke206_tlbwe(void)
tlb = booke206_cur_tlb(env);
+ /* check that we support the targeted size */
+ size_tlb = (env->spr[SPR_BOOKE_MAS1] & MAS1_TSIZE_MASK) >>
MAS1_TSIZE_SHIFT;
+ size_ps = booke206_tlbnps(env, tlbn);
+ if ((env->spr[SPR_BOOKE_MAS1] & MAS1_VALID) && (tlbncfg & TLBnCFG_AVAIL) &&
+ !(size_ps & (1 << size_tlb))) {
+ helper_raise_exception_err(POWERPC_EXCP_PROGRAM,
+ POWERPC_EXCP_INVAL |
+ POWERPC_EXCP_INVAL_INVAL);
+ }
+
if (msr_gs) {
cpu_abort(env, "missing HV implementation\n");
}
--
1.6.0.2
- [Qemu-ppc] [PATCH 19/21] PPC: E500: Implement msgsnd, (continued)
- [Qemu-ppc] [PATCH 19/21] PPC: E500: Implement msgsnd, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 03/21] PPC: Add IVOR 38-42, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 16/21] PPC: Add CPU feature for processor control, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 18/21] PPC: E500: Implement msgclr, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 21/21] PPC: E500: Populate L1CFG0 SPR, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 11/21] PPC: booke206: Check for TLB overrun, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 07/21] PPC: booke206: allow NULL raddr in ppcmas_tlb_check, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 10/21] PPC: booke206: Implement tlbilx, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 20/21] PPC: e500mc: Enable processor control, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 17/21] PPC: Enable doorbell excp handlers, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 09/21] PPC: booke206: Check for min/max TLB entry size,
Alexander Graf <=
- [Qemu-ppc] [PATCH 02/21] PPC: KVM: Update HIOR code to new interface, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 08/21] PPC: booke: add tlbnps handling, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 04/21] PPC: e500mc: add missing IVORs to bitmap, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 05/21] PPC: e500: msync is 440 only, e500 has real sync, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 01/21] KVM: Update headers (except HIOR mess), Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 14/21] PPC: E500: Add some more excp vectors, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 06/21] PPC: rename msync to msync_4xx, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 15/21] PPC: E500: Add doorbell defines, Alexander Graf, 2012/02/01
- [Qemu-ppc] [PATCH 13/21] KVM: Fix compilation on non-x86, Alexander Graf, 2012/02/01
- Re: [Qemu-ppc] [Qemu-devel] [PULL 00/21] ppc patch queue 2012-02-02, Andreas Färber, 2012/02/02