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Re: PCIe with Designware RC.


From: BALATON Zoltan
Subject: Re: PCIe with Designware RC.
Date: Sun, 24 Dec 2023 16:09:00 +0100 (CET)
User-agent: Alpine 2.03 (LMD 1266 2009-07-14)

On Sun, 24 Dec 2023, Shlomo Pongratz wrote:
Thank you, see comment inside.

On Sun, Dec 24, 2023 at 1:11 PM BALATON Zoltan <balaton@eik.bme.hu> wrote:

On Sun, 24 Dec 2023, Shlomo Pongratz wrote:
Hi,
I'm working on a AARCH64 project that uses the designeware
(hw/pci-host/designware.c).
I've copied the designware initialization from hw/arm/fsl-imx7.c and I
hope I've updated the dtsi correctly.
After fixing an issue with the iATU windows (see patch
https://lists.gnu.org/archive/html/qemu-devel/2023-12/msg02643.html)
I've tried to add virtualized NVMe controller.
When I added the lines:
       -device nvme,serial=deadbeef,drive=nvme0,bus=pcie \  (Or without bus=)
       -drive file=/home/pliops/disk-1.img,if=none,id=nvme1 \

You define drive with if=none,id=nvme1 but have drive=nvme0 in your
device. You should refer to the drive you want the device to use so I
think it should either be -device nvme,drive=nvme1 or the if of drive
should be nvme0.

This was a typo, All are nvme0.

Then maybe you need to give more details on what do you use as then the difference is only which pcie bus it's connected to. You could try checking in QEMU monitor with 'info qtree' where devices are attached and how are they organised and with 'info mtree' where BARs are mapped.

Regards,
BALATON Zoltan

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