Re: arm64 disable some feature bit of ID_AA64ISAR0_EL1

[Jiatong Shen]

Thank you very much for detail explanation!

Best,

Jiatong Shen

On Wed, May 17, 2023 at 11:21 PM Peter Maydell <peter.maydell@linaro.org> wrote:

On Wed, 17 May 2023 at 15:36, Jiatong Shen <yshxxsjt715@gmail.com> wrote:
>
> Thank you very much for the clarification. Although cpu type cannot be changed, another
> registers like aa64isar0, aa64isar1 could be changed through KVM_SET_ONE_REG interface,
> and then could potentially hide some cpu features from host. Am I right?

No; as I say, the kernel does not support lying to the guest
about the values of the ID registers currently. If you try this
the kernel will return an EINVAL error code.

> Another questions is why does arm64 have some invariant system registers?

You can't from userspace change the value of an ID register because
the kernel does not support lying to the guest about ID register
values. You can't change it from the guest because it's architecturally
a read-only register.

This is not an in-principle impossible thing, it's just a feature the
kernel doesn't implement. There are some interesting questions about
how you handle CPU errata where the guest needs to install workarounds,
which it currently does by looking at the ID registers that tell it
what implementation it is running on. So there's a combination of
some unanswered "how do we deal with this" questions, and the fact
that it's not a small amount of work. Nobody so far who cares about
having the feature implemented has stepped up to work through those
questions and do the work. (The kvm-arm mailing list is the best
place to talk about this for anybody who is interested in that.)

-- PMM

--

Best Regards,

Jiatong Shen