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Re: Invalid ARM instruction for clang-compiled Android code


From: Michael Goffioul
Subject: Re: Invalid ARM instruction for clang-compiled Android code
Date: Fri, 15 Nov 2019 09:01:15 -0500

On Fri, Nov 15, 2019 at 6:03 AM Peter Maydell <address@hidden> wrote:
Richard, I think we're tripping over the check you added
in commit af2882289951e. Specifically:

+    /* We UNDEF for these UNPREDICTABLE cases.  */
+    if (a->rd == 15 || a->rn == 15 || a->rt == 15
+        || a->rd == a->rn || a->rd == a->rt
+        || (s->thumb && (a->rd == 13 || a->rt == 13))
+        || (mop == MO_64
+            && (a->rt2 == 15
+                || a->rd == a->rt2 || a->rt == a->rt2
+                || (s->thumb && a->rt2 == 13)))) {
+        unallocated_encoding(s);
+        return true;
+    }

in the mop == MO_64 subclause we check for
 a->rt == a->rt2
so we will UNDEF for rt == rt2, as in this example. But the
pseudocode in the spec doesn't say that rt == rt2 is
an UNPREDICTABLE case. (It is an UNDPREDICTABLE
case for LDREXD, but STREXD lets you write the same
register twice if you want to.) Or am I misreading this?

BTW, I can confirm that removing the check "a->rt == a->rt2" seems to fix my problem.


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