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Re: [Qemu-discuss] [Qemu-devel] How to configure QEMU to support APIC vi
From: |
Li Qiang |
Subject: |
Re: [Qemu-discuss] [Qemu-devel] How to configure QEMU to support APIC virtualization |
Date: |
Mon, 5 Aug 2019 12:42:55 +0800 |
ddm <address@hidden> 于2019年8月5日周一 上午11:55写道:
> Hi guys,
>
>
> I have tried via modprobe kvmintel enable_apicv=Y to adjust KVM
> parameter, but it doesn't effect, and
> cat /sys/module/kvm_intel/parameters/enable_apicv always return "N".
> I don't know how to configure KVM or QEMU to support APIC virtualizaion
> feature?
>
>
AFAICT APICv is hardware feature, but I still don't know accurately after
which CPU support it.
You may refer the code about 'enable_apicv' related code in kvm to see how
to detect this capability.
Thanks,
Li Qiang
>
> My host infos are as follows:
> Architecture: x86_64
> CPU op-mode(s): 32-bit, 64-bit
> Byte Order: Little Endian
> CPU(s): 1
> On-line CPU(s) list: 0
> Thread(s) per core: 1
> Core(s) per socket: 1
> Socket(s): 1
> NUMA node(s): 1
> Vendor ID: GenuineIntel
> CPU family: 6
> Model: 142
> Model name: Intel(R) Core(TM) i7-8650U CPU @ 1.90GHz
> Stepping: 10
> CPU MHz: 2112.001
> BogoMIPS: 4224.00
> Virtualization: VT-x
> Hypervisor vendor: VMware
> Virtualization type: full
> L1d cache: 32K
> L1i cache: 32K
> L2 cache: 256K
> L3 cache: 8192K
> NUMA node0 CPU(s): 0
> Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
> pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ss syscall nx pdpe1gb
> rdtscp lm constant_tsc arch_perfmon nopl xtopology tsc_reliable nonstop_tsc
> cpuid pni pclmulqdq vmx ssse3 fma cx16 pcid sse4_1 sse4_2 x2apic movbe
> popcnt tsc_deadline_timer aes xsave avx f16c rdrand hypervisor lahf_lm abm
> 3dnowprefetch cpuid_fault invpcid_single pti ssbd ibrs ibpb stibp
> tpr_shadow vnmi ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2
> invpcid rtm rdseed adx smap xsaveopt arat flush_l1d arch_capabilities
>
>
> Could you tell me how to configure it?
>
>
> Thanks!
>
>