Re: [PATCH 27/76] target/arm: Define FPCR AH, FIZ, NEP bits

[Peter Maydell]

On Sat, 25 Jan 2025 at 17:08, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 1/24/25 08:27, Peter Maydell wrote:
> > diff --git a/target/arm/vfp_helper.c b/target/arm/vfp_helper.c
> > index 3c8f3e65887..8c79ab4fc8a 100644
> > --- a/target/arm/vfp_helper.c
> > +++ b/target/arm/vfp_helper.c
> > @@ -242,6 +242,9 @@ static void vfp_set_fpcr_masked(CPUARMState *env, 
> > uint32_t val, uint32_t mask)
> >       if (!cpu_isar_feature(any_fp16, cpu)) {
> >           val &= ~FPCR_FZ16;
> >       }
> > +    if (!cpu_isar_feature(aa64_afp, cpu)) {
> > +        val &= ~(FPCR_FIZ | FPCR_AH | FPCR_NEP);
> > +    }
>
> I suppose this aa64 check, without is_a64(), is ok because the a32 caller has 
> already
> applied FPSCR_FPCR_MASK.  And similarly for the ebf16 check below.
>
> >
> >       if (!cpu_isar_feature(aa64_ebf16, cpu)) {
> >           val &= ~FPCR_EBF;
>
> But it does feel like we could usefully move these to vfp_set_fpcr, or such?

I dunno, having all the feature tests in one place makes
sense to me. Since we're already doing it here for aa64_ebf16,
I think I prefer to keep the aa64_afp check the same way.
This series is big enough as it is without adding another
cleanup...

thanks
-- PMM