Re: [PATCH 4/4] target/hppa: Implement space register hashing for 64-bit HP-UX

[Richard Henderson]

On 1/28/25 20:07, Helge Deller wrote:
> What I'm not sure about is gva_offset_mask in those hunks and where you
> said I can't read from env:
...
> @@ -4635,6 +4641,7 @@ static void hppa_tr_init_disas_context(DisasContextBase 
> *dcbase, CPUState *cs)
>       ctx->tb_flags = ctx->base.tb->flags;
>       ctx->is_pa20 = hppa_is_pa20(cpu_env(cs));
>       ctx->psw_xb = ctx->tb_flags & (PSW_X | PSW_B);
> +    ctx->gva_offset_mask = cpu_env(cs)->gva_offset_mask;
>   
> Do I need to change the code in form_gva() to read at runtime from env
> instead?

That's one way to do it, sure.  But it's not so hard:

#define TB_FLAG_SPHASH  0x800

void cpu_get_tb_cpu_state(CPUHPPAState *env, vaddr *pc,
                          uint64_t *pcsbase, uint32_t *pflags)
{
...
#ifdef CONFIG_USER_ONLY
    flags |= TB_FLAG_UNALIGN * !env_cpu(env)->prctl_unalign_sigbus;
#else
    if ((env->sr[4] == env->sr[5])
        & (env->sr[4] == env->sr[6])
        & (env->sr[4] == env->sr[7])) {
        flags |= TB_FLAG_SR_SAME;
    }
    if ((flags & PSW_W) &&
        (env->dr[2] & HPPA64_DIAG_SPHASH_ENABLE)) {
        flags |= TB_FLAG_SPHASH;
    }
#endif
...
}

Now tb_flags is constrained by both inputs to update_gva_offset_mask, and you *can* read 
from env->gva_offset_mask.  It's guaranteed to be the same every time.


>       nullify_over(ctx);
>       tcg_gen_st_i64(load_gpr(ctx, a->r1), tcg_env,
>                           offsetof(CPUHPPAState, dr[a->dr]));
> +    if (ctx->is_pa20 && (a->dr == 2)) {
> +        gen_helper_update_gva_offset_mask(tcg_env);
> +        /* Exit TB to recalculate gva_offset_mask on %dr2 */
> +        ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;
> +    }

Better comment:

    /* Update gva_offset_mask from the new value of %dr2 */
    gen_helper_update_gva_offset_mask(tcg_env);
    /* Exit to capture the new value for the next TB. */
    ctx->base.is_jmp = DISAS_IAQ_N_STALE_EXIT;


r~