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[PULL 14/36] target/arm: arm_reset_sve_state() should set FPSR, not FPCR
From: |
Peter Maydell |
Subject: |
[PULL 14/36] target/arm: arm_reset_sve_state() should set FPSR, not FPCR |
Date: |
Tue, 28 Jan 2025 20:12:52 +0000 |
The pseudocode ResetSVEState() does:
FPSR = ZeroExtend(0x0800009f<31:0>, 64);
but QEMU's arm_reset_sve_state() called vfp_set_fpcr() by accident.
Before the advent of FEAT_AFP, this was only setting a collection of
RES0 bits, which vfp_set_fpsr() would then ignore, so the only effect
was that we didn't actually set the FPSR the way we are supposed to
do. Once FEAT_AFP is implemented, setting the bottom bits of FPSR
will change the floating point behaviour.
Call vfp_set_fpsr(), as we ought to.
(Note for stable backports: commit 7f2a01e7368f9 moved this function
from sme_helper.c to helper.c, but it had the same bug before the
move too.)
Cc: qemu-stable@nongnu.org
Fixes: f84734b87461 ("target/arm: Implement SMSTART, SMSTOP")
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20250124162836.2332150-4-peter.maydell@linaro.org
---
target/arm/helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 63997678513..40bdfc851a5 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6413,7 +6413,7 @@ static void arm_reset_sve_state(CPUARMState *env)
memset(env->vfp.zregs, 0, sizeof(env->vfp.zregs));
/* Recall that FFR is stored as pregs[16]. */
memset(env->vfp.pregs, 0, sizeof(env->vfp.pregs));
- vfp_set_fpcr(env, 0x0800009f);
+ vfp_set_fpsr(env, 0x0800009f);
}
void aarch64_set_svcr(CPUARMState *env, uint64_t new, uint64_t mask)
--
2.34.1
- [PULL 03/36] hw/arm/v7m: Remove use of &first_cpu in machine_init(), (continued)
- [PULL 03/36] hw/arm/v7m: Remove use of &first_cpu in machine_init(), Peter Maydell, 2025/01/28
- [PULL 04/36] hw/char/imx_serial: Fix reset value of UFCR register, Peter Maydell, 2025/01/28
- [PULL 08/36] hw/arm/stellaris: Constify read-only arrays, Peter Maydell, 2025/01/28
- [PULL 05/36] hw/char/imx_serial: Update all state before restarting ageing timer, Peter Maydell, 2025/01/28
- [PULL 06/36] hw/pci-host/designware: Expose MSI IRQ, Peter Maydell, 2025/01/28
- [PULL 07/36] hw/arm/stellaris: Link each board schematic, Peter Maydell, 2025/01/28
- [PULL 09/36] hw/arm/stellaris: Remove incorrect unimplemented i2c-0 at 0x40002000, Peter Maydell, 2025/01/28
- [PULL 11/36] hw/arm/stellaris: Use DEVCAP macro to access DeviceCapability registers, Peter Maydell, 2025/01/28
- [PULL 10/36] hw/arm/stellaris: Replace magic numbers by definitions, Peter Maydell, 2025/01/28
- [PULL 12/36] hw/arm/stellaris: Map both I2C controllers, Peter Maydell, 2025/01/28
- [PULL 14/36] target/arm: arm_reset_sve_state() should set FPSR, not FPCR,
Peter Maydell <=
- [PULL 13/36] tests/functional: Add a test for the arm microbit machine, Peter Maydell, 2025/01/28
- [PULL 15/36] target/arm: Use FPSR_ constants in vfp_exceptbits_from_host(), Peter Maydell, 2025/01/28
- [PULL 16/36] target/arm: Use uint32_t in vfp_exceptbits_from_host(), Peter Maydell, 2025/01/28
- [PULL 17/36] target/arm: Define new fp_status_a32 and fp_status_a64, Peter Maydell, 2025/01/28
- [PULL 19/36] target/arm: Use fp_status_a64 or fp_status_a32 in is_ebf(), Peter Maydell, 2025/01/28
- [PULL 18/36] target/arm: Use vfp.fp_status_a64 in A64-only helper functions, Peter Maydell, 2025/01/28
- [PULL 22/36] target/arm: Use FPST_A32 in A32 decoder, Peter Maydell, 2025/01/28
- [PULL 20/36] target/arm: Use fp_status_a32 in vjvct helper, Peter Maydell, 2025/01/28
- [PULL 21/36] target/arm: Use fp_status_a32 in vfp_cmp helpers, Peter Maydell, 2025/01/28
- [PULL 26/36] target/arm: Use fp_status_f16_a32 in AArch32-only helpers, Peter Maydell, 2025/01/28