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[PULL 03/12] hw/arm/aspeed: Invert sdhci write protected pin for AST2600
From: |
Cédric Le Goater |
Subject: |
[PULL 03/12] hw/arm/aspeed: Invert sdhci write protected pin for AST2600 EVB |
Date: |
Mon, 27 Jan 2025 10:42:30 +0100 |
From: Jamin Lin <jamin_lin@aspeedtech.com>
The Write Protect pin of SDHCI model is default active low to match the SDHCI
spec. So, write enable the bit 19 should be 1 and write protected the bit 19
should be 0 at the Present State Register (0x24).
According to the design of AST2600 EVB, the Write Protected pin is active
high by default. To support it, introduces a new "sdhci_wp_inverted"
property in ASPEED MACHINE State and set it true for AST2600 EVB
and set "wp_inverted" property true of sdhci-generic model.
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Link:
https://lore.kernel.org/r/20241114094839.4128404-4-jamin_lin@aspeedtech.com
Signed-off-by: Cédric Le Goater <clg@redhat.com>
---
include/hw/arm/aspeed.h | 1 +
hw/arm/aspeed.c | 7 +++++++
2 files changed, 8 insertions(+)
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h
index cbeacb214ca4..9cae45a1c99c 100644
--- a/include/hw/arm/aspeed.h
+++ b/include/hw/arm/aspeed.h
@@ -39,6 +39,7 @@ struct AspeedMachineClass {
uint32_t macs_mask;
void (*i2c_init)(AspeedMachineState *bmc);
uint32_t uart_default;
+ bool sdhci_wp_inverted;
};
diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
index 2662465ada4f..53a859a6e4aa 100644
--- a/hw/arm/aspeed.c
+++ b/hw/arm/aspeed.c
@@ -409,6 +409,12 @@ static void aspeed_machine_init(MachineState *machine)
OBJECT(get_system_memory()), &error_abort);
object_property_set_link(OBJECT(bmc->soc), "dram",
OBJECT(machine->ram), &error_abort);
+ if (amc->sdhci_wp_inverted) {
+ for (i = 0; i < bmc->soc->sdhci.num_slots; i++) {
+ object_property_set_bool(OBJECT(&bmc->soc->sdhci.slots[i]),
+ "wp-inverted", true, &error_abort);
+ }
+ }
if (machine->kernel_filename) {
/*
* When booting with a -kernel command line there is no u-boot
@@ -1415,6 +1421,7 @@ static void
aspeed_machine_ast2600_evb_class_init(ObjectClass *oc, void *data)
amc->num_cs = 1;
amc->macs_mask = ASPEED_MAC0_ON | ASPEED_MAC1_ON | ASPEED_MAC2_ON |
ASPEED_MAC3_ON;
+ amc->sdhci_wp_inverted = true;
amc->i2c_init = ast2600_evb_i2c_init;
mc->default_ram_size = 1 * GiB;
aspeed_machine_class_init_cpus_defaults(mc);
--
2.48.1
- [PULL 00/12] aspeed queue, Cédric Le Goater, 2025/01/27
- [PULL 01/12] hw/arm/aspeed: fix connect_serial_hds_to_uarts, Cédric Le Goater, 2025/01/27
- [PULL 02/12] hw/sd/sdhci: Introduce a new Write Protected pin inverted property, Cédric Le Goater, 2025/01/27
- [PULL 03/12] hw/arm/aspeed: Invert sdhci write protected pin for AST2600 EVB,
Cédric Le Goater <=
- [PULL 04/12] hw/timer/aspeed: Refactor Timer Callbacks for SoC-Specific Implementations, Cédric Le Goater, 2025/01/27
- [PULL 06/12] aspeed/soc: Support Timer for AST2700, Cédric Le Goater, 2025/01/27
- [PULL 07/12] test/functional: Update the Aspeed aarch64 test, Cédric Le Goater, 2025/01/27
- [PULL 05/12] hw/timer/aspeed: Add AST2700 Support, Cédric Le Goater, 2025/01/27
- [PULL 10/12] aspeed/wdt: Fix coding style, Cédric Le Goater, 2025/01/27
- [PULL 08/12] test/functional: Update buildroot images to 2024.11, Cédric Le Goater, 2025/01/27
- [PULL 11/12] aspeed/wdt: Support software reset mode for AST2600, Cédric Le Goater, 2025/01/27
- [PULL 09/12] aspeed: Create sd devices only when defaults are enabled, Cédric Le Goater, 2025/01/27
- [PULL 12/12] docs/system/arm/aspeed: Remove tacoma-bmc from the documentation, Cédric Le Goater, 2025/01/27
- Re: [PULL 00/12] aspeed queue, Stefan Hajnoczi, 2025/01/27