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[PATCH 46/76] target/arm: Implement FPCR.AH semantics for vector FMIN/FM
From: |
Peter Maydell |
Subject: |
[PATCH 46/76] target/arm: Implement FPCR.AH semantics for vector FMIN/FMAX |
Date: |
Fri, 24 Jan 2025 16:28:06 +0000 |
Implement the FPCR.AH == 1 semantics for vector FMIN/FMAX, by
creating new _ah_ versions of the gvec helpers which invoke the
scalar fmin_ah and fmax_ah helpers on each element.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/tcg/helper-sve.h | 14 ++++++++++++++
target/arm/tcg/translate-a64.c | 21 +++++++++++++++++++--
target/arm/tcg/vec_helper.c | 8 ++++++++
3 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/target/arm/tcg/helper-sve.h b/target/arm/tcg/helper-sve.h
index fea43b319c3..f1b4606f763 100644
--- a/target/arm/tcg/helper-sve.h
+++ b/target/arm/tcg/helper-sve.h
@@ -972,6 +972,20 @@ DEF_HELPER_FLAGS_5(gvec_rsqrts_s, TCG_CALL_NO_RWG,
DEF_HELPER_FLAGS_5(gvec_rsqrts_d, TCG_CALL_NO_RWG,
void, ptr, ptr, ptr, fpst, i32)
+DEF_HELPER_FLAGS_5(gvec_ah_fmax_h, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, fpst, i32)
+DEF_HELPER_FLAGS_5(gvec_ah_fmax_s, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, fpst, i32)
+DEF_HELPER_FLAGS_5(gvec_ah_fmax_d, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, fpst, i32)
+
+DEF_HELPER_FLAGS_5(gvec_ah_fmin_h, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, fpst, i32)
+DEF_HELPER_FLAGS_5(gvec_ah_fmin_s, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, fpst, i32)
+DEF_HELPER_FLAGS_5(gvec_ah_fmin_d, TCG_CALL_NO_RWG,
+ void, ptr, ptr, ptr, fpst, i32)
+
DEF_HELPER_FLAGS_4(sve_faddv_h, TCG_CALL_NO_RWG,
i64, ptr, ptr, fpst, i32)
DEF_HELPER_FLAGS_4(sve_faddv_s, TCG_CALL_NO_RWG,
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index a6f24ad9746..330336f0828 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -5607,6 +5607,13 @@ static bool do_fp3_vector(DisasContext *s, arg_qrrr_e
*a, int data,
FPST_FPCR_F16_A64 :FPST_FPCR_A64);
}
+static bool do_fp3_vector_2fn(DisasContext *s, arg_qrrr_e *a, int data,
+ gen_helper_gvec_3_ptr * const fnormal[3],
+ gen_helper_gvec_3_ptr * const fah[3])
+{
+ return do_fp3_vector(s, a, data, s->fpcr_ah ? fah : fnormal);
+}
+
static bool do_fp3_vector_ah(DisasContext *s, arg_qrrr_e *a, int data,
gen_helper_gvec_3_ptr * const f[3])
{
@@ -5647,14 +5654,24 @@ static gen_helper_gvec_3_ptr * const f_vector_fmax[3] =
{
gen_helper_gvec_fmax_s,
gen_helper_gvec_fmax_d,
};
-TRANS(FMAX_v, do_fp3_vector, a, 0, f_vector_fmax)
+static gen_helper_gvec_3_ptr * const f_vector_fmax_ah[3] = {
+ gen_helper_gvec_ah_fmax_h,
+ gen_helper_gvec_ah_fmax_s,
+ gen_helper_gvec_ah_fmax_d,
+};
+TRANS(FMAX_v, do_fp3_vector_2fn, a, 0, f_vector_fmax, f_vector_fmax_ah)
static gen_helper_gvec_3_ptr * const f_vector_fmin[3] = {
gen_helper_gvec_fmin_h,
gen_helper_gvec_fmin_s,
gen_helper_gvec_fmin_d,
};
-TRANS(FMIN_v, do_fp3_vector, a, 0, f_vector_fmin)
+static gen_helper_gvec_3_ptr * const f_vector_fmin_ah[3] = {
+ gen_helper_gvec_ah_fmin_h,
+ gen_helper_gvec_ah_fmin_s,
+ gen_helper_gvec_ah_fmin_d,
+};
+TRANS(FMIN_v, do_fp3_vector_2fn, a, 0, f_vector_fmin, f_vector_fmin_ah)
static gen_helper_gvec_3_ptr * const f_vector_fmaxnm[3] = {
gen_helper_gvec_fmaxnum_h,
diff --git a/target/arm/tcg/vec_helper.c b/target/arm/tcg/vec_helper.c
index 3fbca8bc8bf..c7af9a04a27 100644
--- a/target/arm/tcg/vec_helper.c
+++ b/target/arm/tcg/vec_helper.c
@@ -1448,6 +1448,14 @@ DO_3OP(gvec_rsqrts_h, helper_rsqrtsf_f16, float16)
DO_3OP(gvec_rsqrts_s, helper_rsqrtsf_f32, float32)
DO_3OP(gvec_rsqrts_d, helper_rsqrtsf_f64, float64)
+DO_3OP(gvec_ah_fmax_h, helper_vfp_ah_maxh, float16)
+DO_3OP(gvec_ah_fmax_s, helper_vfp_ah_maxs, float32)
+DO_3OP(gvec_ah_fmax_d, helper_vfp_ah_maxd, float64)
+
+DO_3OP(gvec_ah_fmin_h, helper_vfp_ah_minh, float16)
+DO_3OP(gvec_ah_fmin_s, helper_vfp_ah_mins, float32)
+DO_3OP(gvec_ah_fmin_d, helper_vfp_ah_mind, float64)
+
#endif
#undef DO_3OP
--
2.34.1
- [PATCH 08/76] target/arm: Use fp_status_a32 in vjvct helper, (continued)
- [PATCH 08/76] target/arm: Use fp_status_a32 in vjvct helper, Peter Maydell, 2025/01/24
- [PATCH 50/76] target/arm: Implement FPCR.AH semantics for SVE FMIN/FMAX immediate, Peter Maydell, 2025/01/24
- [PATCH 55/76] target/arm: Handle FPCR.AH in SVE FNEG, Peter Maydell, 2025/01/24
- [PATCH 11/76] target/arm: Use FPST_FPCR_A64 in A64 decoder, Peter Maydell, 2025/01/24
- [PATCH 26/76] target/arm: Use FPST_FPCR_F16_A64 for halfprec-to-other conversions, Peter Maydell, 2025/01/24
- [PATCH 46/76] target/arm: Implement FPCR.AH semantics for vector FMIN/FMAX,
Peter Maydell <=
- [PATCH 67/76] target/arm: Handle FPCR.AH in SVE FTMAD, Peter Maydell, 2025/01/24
- [PATCH 70/76] target/arm: Implement increased precision FRECPE, Peter Maydell, 2025/01/24
- [PATCH 66/76] target/arm: Handle FPCR.AH in SVE FTSSEL, Peter Maydell, 2025/01/24
- [PATCH 34/76] target/arm: Use FPST_FPCR_AH for BFCVT* insns, Peter Maydell, 2025/01/24
- [PATCH 37/76] target/arm: Define and use new write_fp_*reg_merging() functions, Peter Maydell, 2025/01/24