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Re: [PATCH 2/3] hw/mem/cxl_type3: Fix special_ops memory leak on msix_in
From: |
Zhijian Li (Fujitsu) |
Subject: |
Re: [PATCH 2/3] hw/mem/cxl_type3: Fix special_ops memory leak on msix_init_exclusive_bar() failure |
Date: |
Wed, 22 Jan 2025 00:56:57 +0000 |
User-agent: |
Mozilla Thunderbird |
On 21/01/2025 23:19, Jonathan Cameron wrote:
>>> - msix_uninit_exclusive_bar(pci_dev);
>>> g_free(regs->special_ops);
>>> -err_address_space_free:
>>> +err_msix_uninit:
>>> + msix_uninit_exclusive_bar(pci_dev);
>> This reorder doesn't look correct.
>>
>> Should end up I think as
>> err_release_cdata:
>> cxl_doe_cdata_release(cxl_cstate);
>> err_msix_uninit:
>> msix_uninit_eclusive_bar(pci_dev);
>> err_free_special_ops:
>> g_free(regs->special_ops)
>> err_address_space_free:
> This last label can go away.
>
> I've applied your series with order modified as here to my CXL staging git
> tree.
Thank you very much for your assistance.
Indeed, their order should be rearranged (I submitted them in the sequence in
which I discovered the issues).
I'll push out later today hopefully.
>
> Thanks,
>
> Jonathan
>
>> etc.