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[PATCH v2 15/19] memory: Add an API for ATS support
From: |
CLEMENT MATHIEU--DRIF |
Subject: |
[PATCH v2 15/19] memory: Add an API for ATS support |
Date: |
Mon, 20 Jan 2025 17:41:53 +0000 |
From: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com>
IOMMU have to implement iommu_ats_request_translation to support ATS.
Devices can use IOMMU_TLB_ENTRY_TRANSLATION_ERROR to check the tlb
entries returned by a translation request.
We decided not to use the existing translation operation for 2 reasons.
First, ATS is designed to translate ranges and not isolated addresses.
Second, we need ATS-specific parameters.
Signed-off-by: Clement Mathieu--Drif <clement.mathieu--drif@eviden.com>
---
include/exec/memory.h | 26 ++++++++++++++++++++++++++
system/memory.c | 21 +++++++++++++++++++++
2 files changed, 47 insertions(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 468b003bf1..042d4ea5be 100644
--- a/include/exec/memory.h
+++ b/include/exec/memory.h
@@ -148,6 +148,10 @@ struct IOMMUTLBEntry {
uint32_t pasid;
};
+/* Check if an IOMMU TLB entry indicates a translation error */
+#define IOMMU_TLB_ENTRY_TRANSLATION_ERROR(entry) ((((entry)->perm) & IOMMU_RW)
\
+ == IOMMU_NONE)
+
/*
* Bitmap for different IOMMUNotifier capabilities. Each notifier can
* register with one or multiple IOMMU Notifier capability bit(s).
@@ -525,6 +529,20 @@ struct IOMMUMemoryRegionClass {
* @iommu: the IOMMUMemoryRegion
*/
int (*num_indexes)(IOMMUMemoryRegion *iommu);
+
+ /**
+ * @iommu_ats_request_translation:
+ * This method must be implemented if the IOMMU has ATS enabled
+ *
+ * @see pci_ats_request_translation_pasid
+ */
+ ssize_t (*iommu_ats_request_translation)(IOMMUMemoryRegion *iommu,
+ bool priv_req, bool exec_req,
+ hwaddr addr, size_t length,
+ bool no_write,
+ IOMMUTLBEntry *result,
+ size_t result_length,
+ uint32_t *err_count);
};
typedef struct RamDiscardListener RamDiscardListener;
@@ -1882,6 +1900,14 @@ void memory_region_iommu_replay(IOMMUMemoryRegion
*iommu_mr, IOMMUNotifier *n);
void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
IOMMUNotifier *n);
+ssize_t memory_region_iommu_ats_request_translation(IOMMUMemoryRegion
*iommu_mr,
+ bool priv_req, bool exec_req,
+ hwaddr addr, size_t length,
+ bool no_write,
+ IOMMUTLBEntry *result,
+ size_t result_length,
+ uint32_t *err_count);
+
/**
* memory_region_iommu_get_attr: return an IOMMU attr if get_attr() is
* defined on the IOMMU.
diff --git a/system/memory.c b/system/memory.c
index b17b5538ff..0a379a72bb 100644
--- a/system/memory.c
+++ b/system/memory.c
@@ -2011,6 +2011,27 @@ void
memory_region_unregister_iommu_notifier(MemoryRegion *mr,
memory_region_update_iommu_notify_flags(iommu_mr, NULL);
}
+ssize_t memory_region_iommu_ats_request_translation(IOMMUMemoryRegion
*iommu_mr,
+ bool priv_req,
+ bool exec_req,
+ hwaddr addr, size_t length,
+ bool no_write,
+ IOMMUTLBEntry *result,
+ size_t result_length,
+ uint32_t *err_count)
+{
+ IOMMUMemoryRegionClass *imrc =
+ memory_region_get_iommu_class_nocheck(iommu_mr);
+
+ if (!imrc->iommu_ats_request_translation) {
+ return -ENODEV;
+ }
+
+ return imrc->iommu_ats_request_translation(iommu_mr, priv_req, exec_req,
+ addr, length, no_write, result,
+ result_length, err_count);
+}
+
void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
const IOMMUTLBEvent *event)
{
--
2.47.1
- [PATCH v2 00/19] intel_iommu: Add ATS support, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 01/19] memory: Add permissions in IOMMUAccessFlags, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 02/19] intel_iommu: Declare supported PASID size, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 04/19] intel_iommu: Fill the PASID field when creating an IOMMUTLBEntry, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 12/19] pci: Add a pci-level initialization function for iommu notifiers, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 07/19] pcie: Helper function to check if ATS is enabled, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 15/19] memory: Add an API for ATS support,
CLEMENT MATHIEU--DRIF <=
- [PATCH v2 06/19] pcie: Helper functions to check if PASID is enabled, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 05/19] pcie: Add helper to declare PASID capability for a pcie device, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 03/19] memory: Allow to store the PASID in IOMMUTLBEntry, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 08/19] pci: Cache the bus mastering status in the device, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 10/19] intel_iommu: Implement the get_memory_region_pasid iommu operation, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 09/19] pci: Add IOMMU operations to get memory regions with PASID, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 11/19] memory: Store user data pointer in the IOMMU notifiers, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 13/19] atc: Generic ATC that can be used by PCIe devices that support SVM, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 14/19] atc: Add unit tests, CLEMENT MATHIEU--DRIF, 2025/01/20
- [PATCH v2 16/19] pci: Add a pci-level API for ATS, CLEMENT MATHIEU--DRIF, 2025/01/20