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[PATCH v2 5/8] tests/qtest/xhci: add a test for TR NOOP commands
From: |
Nicholas Piggin |
Subject: |
[PATCH v2 5/8] tests/qtest/xhci: add a test for TR NOOP commands |
Date: |
Sat, 18 Jan 2025 17:08:50 +1000 |
Run some TR NOOP commands through the transfer ring.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
tests/qtest/usb-hcd-xhci-test.c | 36 ++++++++++++++++++++++++++++++++-
1 file changed, 35 insertions(+), 1 deletion(-)
diff --git a/tests/qtest/usb-hcd-xhci-test.c b/tests/qtest/usb-hcd-xhci-test.c
index b9fb2356d26..63359fb70b9 100644
--- a/tests/qtest/usb-hcd-xhci-test.c
+++ b/tests/qtest/usb-hcd-xhci-test.c
@@ -361,9 +361,33 @@ static void submit_cr_trb(XHCIQState *s, XHCITRB *trb)
xhci_db_writel(s, 0, 0); /* doorbell 0 */
}
+static void submit_tr_trb(XHCIQState *s, int slot, XHCITRB *trb)
+{
+ XHCIQSlotState *sl = &s->slots[slot];
+ uint64_t tr_addr = sl->transfer_ring + sl->tr_trb_idx * TRB_SIZE;
+ XHCITRB t;
+
+ trb->control |= sl->tr_trb_c; /* C */
+
+ t.parameter = cpu_to_le64(trb->parameter);
+ t.status = cpu_to_le32(trb->status);
+ t.control = cpu_to_le32(trb->control);
+
+ qtest_memwrite(s->parent->qts, tr_addr, &t, TRB_SIZE);
+ sl->tr_trb_idx++;
+ /* Last entry contains the link, so wrap back */
+ if (sl->tr_trb_idx == sl->tr_trb_entries - 1) {
+ set_link_trb(s, sl->transfer_ring, sl->tr_trb_c, sl->tr_trb_entries);
+ sl->tr_trb_idx = 0;
+ sl->tr_trb_c ^= 1;
+ }
+ xhci_db_writel(s, slot, 1); /* doorbell slot, EP0 target */
+}
+
/*
* This test brings up an endpoint and runs some noops through its command
- * ring and gets responses back on the event ring.
+ * ring and gets responses back on the event ring, then brings up a device
+ * context and runs some noops through its transfer ring.
*
* This could be librified in future (like AHCI0 to have a way to bring up
* an endpoint to test device protocols.
@@ -519,6 +543,16 @@ static void pci_xhci_stress_rings(void)
/* XXX: Could check EP state is running */
+ /* Wrap the transfer ring a few times */
+ for (i = 0; i < 100; i++) {
+ /* Issue a transfer ring slot 0 noop */
+ memset(&trb, 0, TRB_SIZE);
+ trb.control |= TR_NOOP << TRB_TYPE_SHIFT;
+ trb.control |= TRB_TR_IOC;
+ submit_tr_trb(s, slotid, &trb);
+ wait_event_trb(s, &trb);
+ }
+
/* Shut it down */
qpci_msix_disable(s->dev);
--
2.45.2
- [PATCH v2 0/8] usb/xhci: TR NOOP, TI HCD device, more qtests, Nicholas Piggin, 2025/01/18
- [PATCH v2 1/8] hw/usb/xhci: Move HCD constants to a header and add register constants, Nicholas Piggin, 2025/01/18
- [PATCH v2 2/8] hw/usb/xhci: Rename and move HCD register region constants to header, Nicholas Piggin, 2025/01/18
- [PATCH v2 3/8] tests/qtest/xhci: Add controller and device setup and ring tests, Nicholas Piggin, 2025/01/18
- [PATCH v2 4/8] hw/usb/xhci: Support TR NOOP commands, Nicholas Piggin, 2025/01/18
- [PATCH v2 5/8] tests/qtest/xhci: add a test for TR NOOP commands,
Nicholas Piggin <=
- [PATCH v2 6/8] tests/qtest/xhci: test the qemu-xhci device, Nicholas Piggin, 2025/01/18
- [PATCH v2 7/8] hw/usb/hcd-xhci-pci: Make PCI device more configurable, Nicholas Piggin, 2025/01/18
- [PATCH v2 8/8] hw/usb/hcd-xhci-pci: Add TI TUSB73X0 XHCI controller model, Nicholas Piggin, 2025/01/18