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[PATCH 9/9] hw/net/e1000e|igb: Remove xitr_guest_value logic
From: |
Nicholas Piggin |
Subject: |
[PATCH 9/9] hw/net/e1000e|igb: Remove xitr_guest_value logic |
Date: |
Sat, 18 Jan 2025 03:03:05 +1000 |
The guest value xITR logic is not required now that the write functions
store necessary data to be read back, and internal users mask and shift
fields they need as they go.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
hw/net/igb_core.h | 2 --
hw/net/e1000e_core.c | 31 +++++++++++++++----------------
hw/net/igb.c | 2 +-
hw/net/igb_core.c | 1 -
4 files changed, 16 insertions(+), 20 deletions(-)
diff --git a/hw/net/igb_core.h b/hw/net/igb_core.h
index d70b54e318f..3578ab79034 100644
--- a/hw/net/igb_core.h
+++ b/hw/net/igb_core.h
@@ -90,8 +90,6 @@ struct IGBCore {
IGBIntrDelayTimer eitr[IGB_INTR_NUM];
- uint32_t eitr_guest_value[IGB_INTR_NUM];
-
uint8_t permanent_mac[ETH_ALEN];
NICState *owner_nic;
diff --git a/hw/net/e1000e_core.c b/hw/net/e1000e_core.c
index 34bb5f8096b..e9043a0080f 100644
--- a/hw/net/e1000e_core.c
+++ b/hw/net/e1000e_core.c
@@ -2606,18 +2606,6 @@ e1000e_mac_swsm_read(E1000ECore *core, int index)
return val;
}
-static uint32_t
-e1000e_mac_itr_read(E1000ECore *core, int index)
-{
- return core->itr_guest_value;
-}
-
-static uint32_t
-e1000e_mac_eitr_read(E1000ECore *core, int index)
-{
- return core->eitr_guest_value[index - EITR];
-}
-
static uint32_t
e1000e_mac_icr_read(E1000ECore *core, int index)
{
@@ -2835,7 +2823,6 @@ e1000e_set_itr(E1000ECore *core, int index, uint32_t val)
trace_e1000e_irq_itr_set(val);
- core->itr_guest_value = interval;
core->mac[index] = interval;
}
@@ -2847,7 +2834,6 @@ e1000e_set_eitr(E1000ECore *core, int index, uint32_t val)
trace_e1000e_irq_eitr_set(eitr_num, val);
- core->eitr_guest_value[eitr_num] = interval;
core->mac[index] = interval;
}
@@ -3072,6 +3058,7 @@ static const readops e1000e_macreg_readops[] = {
e1000e_getreg(GSCN_1),
e1000e_getreg(FCAL),
e1000e_getreg(FLSWCNT),
+ e1000e_getreg(ITR),
[TOTH] = e1000e_mac_read_clr8,
[GOTCH] = e1000e_mac_read_clr8,
@@ -3105,7 +3092,6 @@ static const readops e1000e_macreg_readops[] = {
[MPRC] = e1000e_mac_read_clr4,
[BPTC] = e1000e_mac_read_clr4,
[TSCTC] = e1000e_mac_read_clr4,
- [ITR] = e1000e_mac_itr_read,
[CTRL] = e1000e_get_ctrl,
[TARC1] = e1000e_get_tarc,
[SWSM] = e1000e_mac_swsm_read,
@@ -3130,7 +3116,7 @@ static const readops e1000e_macreg_readops[] = {
[RETA ... RETA + 31] = e1000e_mac_readreg,
[RSSRK ... RSSRK + 31] = e1000e_mac_readreg,
[MAVTV0 ... MAVTV3] = e1000e_mac_readreg,
- [EITR...EITR + E1000E_MSIX_VEC_NUM - 1] = e1000e_mac_eitr_read
+ [EITR...EITR + E1000E_MSIX_VEC_NUM - 1] = e1000e_mac_readreg,
};
enum { E1000E_NREADOPS = ARRAY_SIZE(e1000e_macreg_readops) };
@@ -3560,13 +3546,26 @@ void e1000e_core_pre_save(E1000ECore *core)
core->tx[i].skip_cp = true;
}
}
+
+ /* back compat */
+ core->itr_guest_value = core->mac[ITR];
+ for (i = 0; i < E1000E_MSIX_VEC_NUM; i++) {
+ core->eitr_guest_value[i] = core->mac[EITR + i];
+ }
}
int
e1000e_core_post_load(E1000ECore *core)
{
+ int i;
NetClientState *nc = qemu_get_queue(core->owner_nic);
+ /* back compat */
+ core->mac[ITR] = core->itr_guest_value;
+ for (i = 0; i < E1000E_MSIX_VEC_NUM; i++) {
+ core->mac[EITR + i] = core->eitr_guest_value[i];
+ }
+
/*
* nc.link_down can't be migrated, so infer link_down according
* to link status bit in core.mac[STATUS].
diff --git a/hw/net/igb.c b/hw/net/igb.c
index 4d93ce629f9..b7539267b7a 100644
--- a/hw/net/igb.c
+++ b/hw/net/igb.c
@@ -580,7 +580,7 @@ static const VMStateDescription igb_vmstate = {
VMSTATE_IGB_INTR_DELAY_TIMER_ARRAY(core.eitr, IGBState,
IGB_INTR_NUM),
- VMSTATE_UINT32_ARRAY(core.eitr_guest_value, IGBState, IGB_INTR_NUM),
+ VMSTATE_UNUSED(sizeof(uint32_t) * IGB_INTR_NUM),
VMSTATE_STRUCT_ARRAY(core.tx, IGBState, IGB_NUM_QUEUES, 0,
igb_vmstate_tx, struct igb_tx),
diff --git a/hw/net/igb_core.c b/hw/net/igb_core.c
index dad32be54fd..62f319d73e8 100644
--- a/hw/net/igb_core.c
+++ b/hw/net/igb_core.c
@@ -3093,7 +3093,6 @@ igb_set_eitr(IGBCore *core, int index, uint32_t val)
val &= E1000_EITR_INTERVAL | E1000_EITR_LLI_EN;
core->mac[index] = val;
- core->eitr_guest_value[eitr_num] = val;
}
static void
--
2.45.2
- [PATCH 0/9] hw/e1000e|igb: interrupts and qtests fixes, Nicholas Piggin, 2025/01/17
- [PATCH 2/9] net/e1000e: Permit disabling interrupt throttling, Nicholas Piggin, 2025/01/17
- [PATCH 1/9] qtest/e1000e|igb: Clear interrupt-cause and msix pending bits after irq, Nicholas Piggin, 2025/01/17
- [PATCH 3/9] qtest/e1000e|igb: assert irqs are clear before triggering an irq, Nicholas Piggin, 2025/01/17
- [PATCH 4/9] net/igb: Fix interrupt throttling interval calculation, Nicholas Piggin, 2025/01/17
- [PATCH 5/9] net/igb: Fix EITR LLI and counter fields, Nicholas Piggin, 2025/01/17
- [PATCH 6/9] net/e1000e|igb: Fix interrupt throttling logic, Nicholas Piggin, 2025/01/17
- [PATCH 7/9] qtest/e1000e|igb: Test interrupt throttling in multiple_transfers test, Nicholas Piggin, 2025/01/17
- [PATCH 9/9] hw/net/e1000e|igb: Remove xitr_guest_value logic,
Nicholas Piggin <=
- [PATCH 8/9] net/e1000e: Fix xITR minimum value, Nicholas Piggin, 2025/01/17