Re: [PATCH v2 37/81] tcg/arm: Add full [US]XT[BH] into {s}extract

[Philippe Mathieu-Daudé]

On 9/1/25 23:57, Philippe Mathieu-Daudé wrote:
> On 7/1/25 09:00, Richard Henderson wrote:
> > The armv6 uxt and sxt opcodes have a 2-bit rotate field
> > which supports extractions from ofs = {0,8,16,24}.
> > Special case ofs = 0, len <= 8 as AND.
> >
> > Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> > ---
> >   tcg/arm/tcg-target-has.h | 17 +++++++++++++
> >   tcg/arm/tcg-target.c.inc | 54 +++++++++++++++++++++++++++++++++++-----
> >   2 files changed, 65 insertions(+), 6 deletions(-)
> >
> > diff --git a/tcg/arm/tcg-target-has.h b/tcg/arm/tcg-target-has.h
> > index 316185500d..d6ca35ed1a 100644
>
> Missing:
>
> -- >8 --
> @@ -41,8 +41,8 @@ extern bool use_neon_instructions;
>   #define TCG_TARGET_HAS_ctz_i32          use_armv7_instructions
>   #define TCG_TARGET_HAS_ctpop_i32        0
>   #define TCG_TARGET_HAS_deposit_i32      use_armv7_instructions
> -#define TCG_TARGET_HAS_extract_i32      use_armv7_instructions
> -#define TCG_TARGET_HAS_sextract_i32     use_armv7_instructions
> +#define TCG_TARGET_HAS_extract_i32      1
> +#define TCG_TARGET_HAS_sextract_i32     1
>   #define TCG_TARGET_HAS_extract2_i32     1
>   #define TCG_TARGET_HAS_negsetcond_i32   1
>   #define TCG_TARGET_HAS_mulu2_i32        1
> ---

With that chunk squashed:
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>