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Re: [PATCH RESEND v2 00/19] hw/net/xilinx_ethlite: Map RAM buffers as RA


From: Philippe Mathieu-Daudé
Subject: Re: [PATCH RESEND v2 00/19] hw/net/xilinx_ethlite: Map RAM buffers as RAM and remove tswap() calls
Date: Sun, 12 Jan 2025 19:17:32 +0100
User-agent: Mozilla Thunderbird

On 14/11/24 21:59, Philippe Mathieu-Daudé wrote:

Philippe Mathieu-Daudé (19):
   hw/microblaze: Restrict MemoryRegionOps are implemented as 32-bit
   hw/net/xilinx_ethlite: Convert some debug logs to trace events
   hw/net/xilinx_ethlite: Remove unuseful debug logs
   hw/net/xilinx_ethlite: Update QOM style
   hw/net/xilinx_ethlite: Correct maximum RX buffer size
   hw/net/xilinx_ethlite: Map MDIO registers (as unimplemented)
   hw/net/xilinx_ethlite: Rename rxbuf -> port_index
   hw/net/xilinx_ethlite: Introduce txbuf_ptr() helper
   hw/net/xilinx_ethlite: Introduce rxbuf_ptr() helper
   hw/net/xilinx_ethlite: Access TX_GIE register for each port
   hw/net/xilinx_ethlite: Access TX_LEN register for each port
   hw/net/xilinx_ethlite: Access TX_CTRL register for each port
   hw/net/xilinx_ethlite: Map RX_CTRL as MMIO
   hw/net/xilinx_ethlite: Map TX_LEN as MMIO
   hw/net/xilinx_ethlite: Map TX_GIE as MMIO
   hw/net/xilinx_ethlite: Map TX_CTRL as MMIO
   hw/net/xilinx_ethlite: Map the RAM buffer as RAM memory region
   hw/net/xilinx_ethlite: Rename 'mmio' MR as 'container'
   hw/net/xilinx_ethlite: Map RESERVED I/O as unimplemented

Series queued.



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