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[PATCH v1 0/3] target/i386: Add the immediate form MSR access instructio
From: |
Xin Li (Intel) |
Subject: |
[PATCH v1 0/3] target/i386: Add the immediate form MSR access instruction support |
Date: |
Fri, 3 Jan 2025 00:48:24 -0800 |
The immediate form of MSR access instructions are primarily motivated by
performance, not code size: by having the MSR number in an immediate, it
is available *much* earlier in the pipeline, which allows the hardware
much more leeway about how a particular MSR is handled.
This new CPU feature is advertised through bit 5 of CPUID.7.1.ECX, which
needs to be added as a new CPU feature word.
WRMSRNS doesn't become a required feature for FERD, and Linux has removed
the dependency, as such remove the dependency from Qemu.
Xin Li (Intel) (3):
target/i386: Remove FRED dependency on WRMSRNS
target/i386: Add a new CPU feature word for CPUID.7.1.ECX
target/i386: Add the immediate form MSR access instruction support
target/i386/cpu.c | 27 ++++++++++++++++++++++-----
target/i386/cpu.h | 4 ++++
2 files changed, 26 insertions(+), 5 deletions(-)
base-commit: 1ada452efc7d8f8bf42cd5e8a2af1b4ac9167a1f
--
2.47.1
- [PATCH v1 0/3] target/i386: Add the immediate form MSR access instruction support,
Xin Li (Intel) <=