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[PATCH v2 35/54] target/avr: Convert to TCGCPUOps.tlb_fill_align
From: |
Richard Henderson |
Subject: |
[PATCH v2 35/54] target/avr: Convert to TCGCPUOps.tlb_fill_align |
Date: |
Thu, 14 Nov 2024 08:01:11 -0800 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/avr/cpu.h | 7 ++++---
target/avr/cpu.c | 2 +-
target/avr/helper.c | 19 ++++++++++++-------
3 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/target/avr/cpu.h b/target/avr/cpu.h
index 4725535102..cdd3bcd418 100644
--- a/target/avr/cpu.h
+++ b/target/avr/cpu.h
@@ -23,6 +23,7 @@
#include "cpu-qom.h"
#include "exec/cpu-defs.h"
+#include "exec/memop.h"
#ifdef CONFIG_USER_ONLY
#error "AVR 8-bit does not support user mode"
@@ -238,9 +239,9 @@ static inline void cpu_set_sreg(CPUAVRState *env, uint8_t
sreg)
env->sregI = (sreg >> 7) & 0x01;
}
-bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr);
+bool avr_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, vaddr addr,
+ MMUAccessType access_type, int mmu_idx,
+ MemOp memop, int size, bool probe, uintptr_t ra);
#include "exec/cpu-all.h"
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index 3132842d56..a7fe869396 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -211,7 +211,7 @@ static const TCGCPUOps avr_tcg_ops = {
.restore_state_to_opc = avr_restore_state_to_opc,
.cpu_exec_interrupt = avr_cpu_exec_interrupt,
.cpu_exec_halt = avr_cpu_has_work,
- .tlb_fill = avr_cpu_tlb_fill,
+ .tlb_fill_align = avr_cpu_tlb_fill_align,
.do_interrupt = avr_cpu_do_interrupt,
};
diff --git a/target/avr/helper.c b/target/avr/helper.c
index 345708a1b3..a18f11aa9f 100644
--- a/target/avr/helper.c
+++ b/target/avr/helper.c
@@ -104,11 +104,11 @@ hwaddr avr_cpu_get_phys_page_debug(CPUState *cs, vaddr
addr)
return addr; /* I assume 1:1 address correspondence */
}
-bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
- MMUAccessType access_type, int mmu_idx,
- bool probe, uintptr_t retaddr)
+bool avr_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, vaddr address,
+ MMUAccessType access_type, int mmu_idx,
+ MemOp memop, int size, bool probe, uintptr_t ra)
{
- int prot, page_size = TARGET_PAGE_SIZE;
+ int prot, lg_page_size = TARGET_PAGE_BITS;
uint32_t paddr;
address &= TARGET_PAGE_MASK;
@@ -141,15 +141,20 @@ bool avr_cpu_tlb_fill(CPUState *cs, vaddr address, int
size,
* to force tlb_fill to be called for the next access.
*/
if (probe) {
- page_size = 1;
+ lg_page_size = 0;
} else {
cpu_env(cs)->fullacc = 1;
- cpu_loop_exit_restore(cs, retaddr);
+ cpu_loop_exit_restore(cs, ra);
}
}
}
- tlb_set_page(cs, address, paddr, prot, mmu_idx, page_size);
+ memset(out, 0, sizeof(*out));
+ out->phys_addr = paddr;
+ out->prot = prot;
+ out->attrs = MEMTXATTRS_UNSPECIFIED;
+ out->lg_page_size = lg_page_size;
+
return true;
}
--
2.43.0
- [PATCH v2 11/54] accel/tcg: Remove IntervalTree entry in tlb_flush_page_locked, (continued)
- [PATCH v2 11/54] accel/tcg: Remove IntervalTree entry in tlb_flush_page_locked, Richard Henderson, 2024/11/14
- [PATCH v2 10/54] accel/tcg: Populate IntervalTree in tlb_set_page_full, Richard Henderson, 2024/11/14
- [PATCH v2 13/54] accel/tcg: Process IntervalTree entries in tlb_reset_dirty, Richard Henderson, 2024/11/14
- [PATCH v2 24/54] accel/tcg: Preserve tlb flags in tlb_set_compare, Richard Henderson, 2024/11/14
- [PATCH v2 25/54] accel/tcg: Return CPUTLBEntryFull not pointer in probe_access_full_mmu, Richard Henderson, 2024/11/14
- [PATCH v2 35/54] target/avr: Convert to TCGCPUOps.tlb_fill_align,
Richard Henderson <=
- [PATCH v2 16/54] accel/tcg: Pass full addr to victim_tlb_hit, Richard Henderson, 2024/11/14
- [PATCH v2 23/54] accel/tcg: Check original prot bits for read in atomic_mmu_lookup, Richard Henderson, 2024/11/14
- [PATCH v2 26/54] accel/tcg: Return CPUTLBEntryFull not pointer in probe_access_full, Richard Henderson, 2024/11/14
- [PATCH v2 21/54] accel/tcg: Delay plugin adjustment in probe_access_internal, Richard Henderson, 2024/11/14
- [PATCH v2 38/54] target/m68k: Convert to TCGCPUOps.tlb_fill_align, Richard Henderson, 2024/11/14