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Re: [PATCH v3 05/17] intel_iommu: Rename slpte to pte
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From: |
Jason Wang |
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Subject: |
Re: [PATCH v3 05/17] intel_iommu: Rename slpte to pte |
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Date: |
Fri, 27 Sep 2024 11:47:58 +0800 |
On Wed, Sep 11, 2024 at 1:26 PM Zhenzhong Duan <zhenzhong.duan@intel.com> wrote:
>
> From: Yi Liu <yi.l.liu@intel.com>
>
> Because we will support both FST(a.k.a, FLT) and SST(a.k.a, SLT) translation,
> rename variable and functions from slpte to pte whenever possible.
>
> But some are SST only, they are renamed with sl_ prefix.
>
> Signed-off-by: Yi Liu <yi.l.liu@intel.com>
> Co-developed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
> Signed-off-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>
> Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> ---
Acked-by: Jason Wang <jasowang@redhat.com>
Thanks
- Re: [PATCH v3 02/17] intel_iommu: Make pasid entry type check accurate, (continued)
- [PATCH v3 03/17] intel_iommu: Add a placeholder variable for scalable modern mode, Zhenzhong Duan, 2024/09/11
- [PATCH v3 04/17] intel_iommu: Flush stage-2 cache in PASID-selective PASID-based iotlb invalidation, Zhenzhong Duan, 2024/09/11
- [PATCH v3 05/17] intel_iommu: Rename slpte to pte, Zhenzhong Duan, 2024/09/11
- [PATCH v3 06/17] intel_iommu: Implement stage-1 translation, Zhenzhong Duan, 2024/09/11
- [PATCH v3 07/17] intel_iommu: Check if the input address is canonical, Zhenzhong Duan, 2024/09/11
- [PATCH v3 08/17] intel_iommu: Set accessed and dirty bits during first stage translation, Zhenzhong Duan, 2024/09/11