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[PULL 23/27] hw/net/can/xlnx-versal-canfd: Fix FIFO issues
From: |
Peter Maydell |
Subject: |
[PULL 23/27] hw/net/can/xlnx-versal-canfd: Fix FIFO issues |
Date: |
Fri, 13 Sep 2024 16:14:07 +0100 |
From: Doug Brown <doug@schmorgal.com>
The read index should not be changed when storing a new message into the
RX or TX FIFO. Changing it at this point will cause the reader to get
out of sync. The wrapping of the read index is already handled by the
pre-write functions for the FIFO status registers anyway.
Additionally, the calculation for wrapping the store index was off by
one, which caused new messages to be written to the wrong location in
the FIFO. This caused incorrect messages to be delivered.
Signed-off-by: Doug Brown <doug@schmorgal.com>
Reviewed-by: Francisco Iglesias <francisco.iglesias@amd.com>
Message-id: 20240827034927.66659-8-doug@schmorgal.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
hw/net/can/xlnx-versal-canfd.c | 36 +++-------------------------------
1 file changed, 3 insertions(+), 33 deletions(-)
diff --git a/hw/net/can/xlnx-versal-canfd.c b/hw/net/can/xlnx-versal-canfd.c
index ccfed364cc9..e148bd7b465 100644
--- a/hw/net/can/xlnx-versal-canfd.c
+++ b/hw/net/can/xlnx-versal-canfd.c
@@ -1144,18 +1144,8 @@ static void update_rx_sequential(XlnxVersalCANFDState *s,
read_index = ARRAY_FIELD_EX32(s->regs, RX_FIFO_STATUS_REGISTER,
RI);
store_index = read_index + fill_level;
- if (read_index == s->cfg.rx0_fifo - 1) {
- /*
- * When ri is s->cfg.rx0_fifo - 1 i.e. max, it goes cyclic that
- * means we reset the ri to 0x0.
- */
- read_index = 0;
- ARRAY_FIELD_DP32(s->regs, RX_FIFO_STATUS_REGISTER, RI,
- read_index);
- }
-
if (store_index > s->cfg.rx0_fifo - 1) {
- store_index -= s->cfg.rx0_fifo - 1;
+ store_index -= s->cfg.rx0_fifo;
}
store_location = R_RB_ID_REGISTER +
@@ -1172,18 +1162,8 @@ static void update_rx_sequential(XlnxVersalCANFDState *s,
RI_1);
store_index = read_index + fill_level;
- if (read_index == s->cfg.rx1_fifo - 1) {
- /*
- * When ri is s->cfg.rx1_fifo - 1 i.e. max, it goes cyclic that
- * means we reset the ri to 0x0.
- */
- read_index = 0;
- ARRAY_FIELD_DP32(s->regs, RX_FIFO_STATUS_REGISTER, RI_1,
- read_index);
- }
-
if (store_index > s->cfg.rx1_fifo - 1) {
- store_index -= s->cfg.rx1_fifo - 1;
+ store_index -= s->cfg.rx1_fifo;
}
store_location = R_RB_ID_REGISTER_1 +
@@ -1265,18 +1245,8 @@ static void tx_fifo_stamp(XlnxVersalCANFDState *s,
uint32_t tb0_regid)
" Discarding the message\n");
ARRAY_FIELD_DP32(s->regs, INTERRUPT_STATUS_REGISTER, TXEOFLW, 1);
} else {
- if (read_index == s->cfg.tx_fifo - 1) {
- /*
- * When ri is s->cfg.tx_fifo - 1 i.e. max, it goes cyclic that
- * means we reset the ri to 0x0.
- */
- read_index = 0;
- ARRAY_FIELD_DP32(s->regs, TX_EVENT_FIFO_STATUS_REGISTER,
TXE_RI,
- read_index);
- }
-
if (store_index > s->cfg.tx_fifo - 1) {
- store_index -= s->cfg.tx_fifo - 1;
+ store_index -= s->cfg.tx_fifo;
}
assert(store_index < s->cfg.tx_fifo);
--
2.34.1
- [PULL 03/27] target/s390: Convert CPU to Resettable interface, (continued)
- [PULL 03/27] target/s390: Convert CPU to Resettable interface, Peter Maydell, 2024/09/13
- [PULL 09/27] hw: Remove device_phases_reset(), Peter Maydell, 2024/09/13
- [PULL 13/27] hw/boards: Add hvf_get_physical_address_range to MachineClass, Peter Maydell, 2024/09/13
- [PULL 06/27] hw: Define new device_class_set_legacy_reset(), Peter Maydell, 2024/09/13
- [PULL 21/27] hw/net/can/xlnx-versal-canfd: Fix byte ordering, Peter Maydell, 2024/09/13
- [PULL 24/27] MAINTAINERS: Remove Vikram Garhwal as maintainer, Peter Maydell, 2024/09/13
- [PULL 25/27] MAINTAINERS: Update Xilinx Versal OSPI maintainer's email address, Peter Maydell, 2024/09/13
- [PULL 17/27] hw/net/can/xlnx-versal-canfd: Fix interrupt level, Peter Maydell, 2024/09/13
- [PULL 16/27] target/arm/tcg: refine cache descriptions with a wrapper, Peter Maydell, 2024/09/13
- [PULL 08/27] hw: Rename DeviceClass::reset field to legacy_reset, Peter Maydell, 2024/09/13
- [PULL 23/27] hw/net/can/xlnx-versal-canfd: Fix FIFO issues,
Peter Maydell <=
- [PULL 20/27] hw/net/can/xlnx-versal-canfd: Handle flags correctly, Peter Maydell, 2024/09/13
- [PULL 10/27] hw/core/qdev: Simplify legacy_reset handling, Peter Maydell, 2024/09/13
- [PULL 12/27] kvm: Use 'unsigned long' for request argument in functions wrapping ioctl(), Peter Maydell, 2024/09/13
- [PULL 18/27] hw/net/can/xlnx-versal-canfd: Fix CAN FD flag check, Peter Maydell, 2024/09/13
- [PULL 22/27] hw/net/can/xlnx-versal-canfd: Simplify DLC conversions, Peter Maydell, 2024/09/13
- [PULL 27/27] hw/intc/arm_gic: fix spurious level triggered interrupts, Peter Maydell, 2024/09/13
- [PULL 19/27] hw/net/can/xlnx-versal-canfd: Translate CAN ID registers, Peter Maydell, 2024/09/13
- [PULL 15/27] hvf: arm: Implement and use hvf_get_physical_address_range, Peter Maydell, 2024/09/13
- [PULL 07/27] hw: Use device_class_set_legacy_reset() instead of opencoding, Peter Maydell, 2024/09/13
- [PULL 11/27] hw/core/resettable: Remove transitional_function machinery, Peter Maydell, 2024/09/13