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[PATCH v3 15/29] target/arm: Fix whitespace near gen_srshr64_i64
From: |
Richard Henderson |
Subject: |
[PATCH v3 15/29] target/arm: Fix whitespace near gen_srshr64_i64 |
Date: |
Wed, 11 Sep 2024 19:41:00 -0700 |
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/tcg/gengvec.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/tcg/gengvec.c b/target/arm/tcg/gengvec.c
index 33c5084ea6..3abdc57202 100644
--- a/target/arm/tcg/gengvec.c
+++ b/target/arm/tcg/gengvec.c
@@ -304,7 +304,7 @@ void gen_srshr32_i32(TCGv_i32 d, TCGv_i32 a, int32_t sh)
tcg_gen_add_i32(d, d, t);
}
- void gen_srshr64_i64(TCGv_i64 d, TCGv_i64 a, int64_t sh)
+void gen_srshr64_i64(TCGv_i64 d, TCGv_i64 a, int64_t sh)
{
TCGv_i64 t = tcg_temp_new_i64();
--
2.43.0
- [PATCH v3 05/29] target/arm: Use tcg_gen_extract2_i64 for EXT, (continued)
- [PATCH v3 05/29] target/arm: Use tcg_gen_extract2_i64 for EXT, Richard Henderson, 2024/09/11
- [PATCH v3 07/29] target/arm: Convert TBL, TBX to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 09/29] target/arm: Simplify do_reduction_op, Richard Henderson, 2024/09/11
- [PATCH v3 11/29] target/arm: Convert FMAXNMV, FMINNMV, FMAXV, FMINV to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 08/29] target/arm: Convert UZP, TRN, ZIP to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 10/29] target/arm: Convert ADDV, *ADDLV, *MAXV, *MINV to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 12/29] target/arm: Convert FMOVI (scalar, immediate) to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 13/29] target/arm: Convert MOVI, FMOV, ORR, BIC (vector immediate) to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 16/29] target/arm: Convert handle_vec_simd_shri to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 19/29] target/arm: Convert SSHLL, USHLL to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 15/29] target/arm: Fix whitespace near gen_srshr64_i64,
Richard Henderson <=
- [PATCH v3 17/29] target/arm: Convert handle_vec_simd_shli to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 14/29] target/arm: Introduce gen_gvec_sshr, gen_gvec_ushr, Richard Henderson, 2024/09/11
- [PATCH v3 18/29] target/arm: Use {, s}extract in handle_vec_simd_wshli, Richard Henderson, 2024/09/11
- [PATCH v3 20/29] target/arm: Push tcg_rnd into handle_shri_with_rndacc, Richard Henderson, 2024/09/11
- [PATCH v3 23/29] target/arm: Convert handle_scalar_simd_shri to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 21/29] target/arm: Split out subroutines of handle_shri_with_rndacc, Richard Henderson, 2024/09/11
- [PATCH v3 25/29] target/arm: Convert VQSHL, VQSHLU to gvec, Richard Henderson, 2024/09/11
- [PATCH v3 27/29] target/arm: Convert SQSHL, UQSHL, SQSHLU (immediate) to decodetree, Richard Henderson, 2024/09/11
- [PATCH v3 26/29] target/arm: Widen NeonGenNarrowEnvFn return to 64 bits, Richard Henderson, 2024/09/11