Re: [PATCH] target/arm/tcg: refine cache descriptions with a wrapper

[Alireza Sanaee]

On Fri, 30 Aug 2024 17:29:59 +0100
Peter Maydell <peter.maydell@linaro.org> wrote:

> On Fri, 30 Aug 2024 at 17:19, Alireza Sanaee
> <alireza.sanaee@huawei.com> wrote:
> >
> > Add wrapper for different types of CPUs available in tcg to decribe
> > caches. Two functions `make_ccsidr32` and `make_ccsidr64`
> > describing descriptions. The 32 bit version receives extra
> > parameters that became unknown later in 64 bit.
> >
> > For CCSIDR register, 32 bit version follows specification [1].
> > Conversely, 64 bit version follows specification [2].
> >
> > [1] B4.1.19, ARM Architecture Reference Manual ARMv7-A and ARMv7-R
> > edition, https://developer.arm.com/documentation/ddi0406
> > [2] D23.2.29, ARM Architecture Reference Manual for A-profile
> > Architecture, https://developer.arm.com/documentation/ddi0487/latest/  
> 
> Could you explain in the commit message the reason for
> making this change, please?
> 
> thanks
> -- PMM

Sure. Just to clarify here, the patch allows for
easier manipulation of cache register description which can be handy for
testing in particular, and it cleans up existing descriptions of course.

Thanks,
Alireza