Re: [PATCH] hw/arm/xilinx_zynq: Enable Security Extensions

[Peter Maydell]

On Wed, 28 Aug 2024 at 01:51, Sebastian Huber
<sebastian.huber@embedded-brains.de> wrote:
>
> The system supports the Security Extensions (core and GIC).  This change is
> necessary to run tests which pass on the real hardware.
>
> Signed-off-by: Sebastian Huber <sebastian.huber@embedded-brains.de>

(Added the maintainers to cc.)

Does the system have any secure-only devices, RAM, etc?

How much testing have you done with this change? (The main
reason we disabled has-el3 on this board back in 2014 was
as a backwards-compatibility thing when we added EL3 support
to the CPU model -- we didn't have a ton of images for the
board so we erred on the safe side of not changing the
behaviour to avoid potentially breaking existing guest code.)

> ---
>  hw/arm/xilinx_zynq.c | 8 --------
>  1 file changed, 8 deletions(-)
>
> diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
> index 3c56b9abe1..37c234f5ab 100644
> --- a/hw/arm/xilinx_zynq.c
> +++ b/hw/arm/xilinx_zynq.c
> @@ -219,14 +219,6 @@ static void zynq_init(MachineState *machine)
>      for (n = 0; n < smp_cpus; n++) {
>          Object *cpuobj = object_new(machine->cpu_type);
>
> -        /*
> -         * By default A9 CPUs have EL3 enabled.  This board does not 
> currently
> -         * support EL3 so the CPU EL3 property is disabled before 
> realization.
> -         */
> -        if (object_property_find(cpuobj, "has_el3")) {
> -            object_property_set_bool(cpuobj, "has_el3", false, &error_fatal);
> -        }
> -
>          object_property_set_int(cpuobj, "midr", ZYNQ_BOARD_MIDR,
>                                  &error_fatal);
>          object_property_set_int(cpuobj, "reset-cbar", MPCORE_PERIPHBASE,

thanks
-- PMM